Abstract: A method for dropping lower priority packets for transmission over a wireless communication medium is provided. A central device receives one or more packets to be transferred to one or more data providers, each packet having a priority. Then, based on the priority, a media access controller stores each of the packets in one or more priority queues in a fixed shared memory space in such a way as to maintain the order in which the packets were received in each of the priority queues. The media access controller monitors the number of packets in each of the priority queues and signals an interrupt when a packet threshold is exceeded in one or more of the priority queues. The media access controller then drops lower priority packets in the fixed shared memory space based on the order received to guarantee that there is enough memory to store higher priority packets in the fixed shared memory space.

Abstract: A method for dropping lower priority packets for transmission over a wireless communication medium is provided. A central device receives one or more packets to be transferred to one or more data providers, each packet having a priority. Then, based on the priority, a media access controller stores each of the packets in one or more priority queues in a fixed shared memory space in such a way as to maintain the order in which the packets were received in each of the priority queues. The media access controller monitors the number of packets in each of the priority queues and signals an interrupt when a packet threshold is exceeded in one or more of the priority queues. The media access controller then drops lower priority packets in the fixed shared memory space based on the order received to guarantee that there is enough memory to store higher priority packets in the fixed shared memory space.

Abstract: A method for dropping lower priority packets for transmission over a wireless communication medium is provided. A central device receives one or more packets to be transferred to one or more data providers, each packet having a priority. Then, based on the priority, a media access controller stores each of the packets in one or more priority queues in a fixed shared memory space in such a way as to maintain the order in which the packets were received in each of the priority queues. The media access controller monitors the number of packets in each of the priority queues and signals an interrupt when a packet threshold is exceeded in one or more of the priority queues. The media access controller then drops lower priority packets in the fixed shared memory space based on the order received to guarantee that there is enough memory to store higher priority packets in the fixed shared memory space.

Abstract: A method and system for dropping lower priority packets for transmission over a communication medium is provided. A cable modem termination system receives one or more packets to be transferred to one or more data providers, each packet having a priority. Then, based on the priority, a media access controller stores each of the packets in one or more priority queues in a fixed shared memory space in such a way as to maintain the order in which the packets were received in each of the priority queues. The media access controller monitors the number of packets in each of the priority queues and signals an interrupt when a packet threshold is exceeded in one or more of the priority queues. The media access controller then drops lower priority packets in the fixed shared memory space based on the order received to guarantee that there is enough memory to store higher priority packets in the fixed shared memory space.

Abstract: The present invention provides apparatus and methods for performing payload header suppression (PHS), expansion, and verification in hardware. A PHS verify circuit reads a data packet until it reaches the location where the first byte must be compared to PHS rule verify bytes. Next, all the relevant bytes in the payload header are compared to the PHS rule verify bytes obtained from a payload header suppression rule mask. Upon completion of the compare, a flag is generated to a PHS suppress circuit indicating that verification has passed or failed. For payload headers passing the verification process, one or more bits are suppressed in the payload header and a the payload header suppressed and a payload header suppression index is added to the suppressed packet payload header. Following transmission, the suppression indexed is used to identify the bits to be reinserted into the suppressed payload header.

Abstract: A media access controller (MAC) is configured with a DOCSIS Header creator circuit. The DOCSIS header creator circuit is configured with logic for receiving a data packet and determining whether the received data packet has an existing packet header prepended thereto. The DOCSIS header creator circuit is further configured to determine if the length of the received data packet includes a cyclic redundancy code. Still further, the DOCSIS header creator circuit is configured to determine a packet header length field value for the received data packet. If the DOCSIS header creator circuit determines that a cyclic redundancy code needs to be included in with the received data packet, then the DOCSIS header creator circuit is able to generate a CRC flag. If the data packet needs to be encrypted, then the DOCSIS header creator circuit will generate an encryption flag if it is determined that the received data packet should be encrypted.

Abstract: A media access controller (MAC) is configured with a header creator circuit. The header creator circuit is configured with logic for receiving a data packet and determining whether the received data packet has an existing packet header prepended thereto. The header creator circuit is further configured to determine if the length of the received data packet includes a cyclic redundancy code. Still further, the header creator circuit is configured to determine a packet header length field value for the received data packet. If the header creator circuit determines that a cyclic redundancy code needs to be included with the received data packet, then the header creator circuit is able to generate a CRC flag. If the data packet needs to be encrypted, then the header creator circuit will generate an encryption flag if it is determined that the received data packet should be encrypted. Finally, the header creator circuit generates a packet header having a plurality of fields.

Abstract: A supervisory communications device, such as a headend device within a communications network, monitors and controls communications with a plurality of remote communications devices throughout a widely distributed network. The supervisory device allocates bandwidth on the upstream channels by sending MAP messages over its downstream channel. A highly integrated media access controller integrated circuit (MAC IC) operates within the headend to provide lower level processing on signals exchanged with the remote devices. The enhanced functionality of the MAC IC relieves the processing burden on the headend CPU and increases packet throughput.

Abstract: A method for dropping lower priority packets for transmission over a wireless communication medium is provided. A central device receives one or more packets to be transferred to one or more data providers, each packet having a priority. Then, based on the priority, a media access controller stores each of the packets in one or more priority queues in a fixed shared memory space in such a way as to maintain the order in which the packets were received in each of the priority queues. The media access controller monitors the number of packets in each of the priority queues and signals an interrupt when a packet threshold is exceeded in one or more of the priority queues. The media access controller then drops lower priority packets in the fixed shared memory space based on the order received to guarantee that there is enough memory to store higher priority packets in the fixed shared memory space.

Abstract: The present invention provides methods for performing payload header suppression (PHS), expansion, and verification in hardware. A PHS verify circuit reads a data packet until it reaches the location where the first byte must be compared to PHS rule verify bytes. Next, all the relevant bytes in the payload header are compared to the PHS rule verify bytes obtained from a payload header suppression rule mask. Upon completion of the compare, a flag is generated to a PHS suppress circuit indicating that verification has passed or failed. For payload headers passing the verification process, the payload header suppress circuit examines the payload header suppression mask to identify one or more bits in the payload header for which an associated byte string is to be suppressed. Next, the associated byte string for each of the identified bits are suppressed to generate a suppressed packet payload header. Finally, a payload header suppression index is added to the suppressed packet payload header.

Abstract: A method and system for dropping lower priority packets for transmission over a communication medium is provided. A cable modem termination system receives one or more packets to be transferred to one or more data providers, each packet having a priority. Then, based on the priority, a media access controller stores each of the packets in one or more priority queues in a fixed shared memory space in such a way as to maintain the order in which the packets were received in each of the priority queues. The media access controller monitors the number of packets in each of the priority queues and signals an interrupt when a packet threshold is exceeded in one or more of the priority queues. The media access controller then drops lower priority packets in the fixed shared memory space based on the order received to guarantee that there is enough memory to store higher priority packets in the fixed shared memory space.

Abstract: The present invention provides apparatus and methods for performing payload header suppression (PHS), expansion, and verification in hardware. A PHS verify circuit reads a data packet until it reaches the location where the first byte must be compared to PHS rule verify bytes. Next, all the relevant bytes in the payload header are compared to the PHS rule verify bytes obtained from a payload header suppression rule mask. Upon completion of the compare, a flag is generated to a PHS suppress circuit indicating that verification has passed or failed. For payload headers passing the verification process, the payload header suppress circuit examines the payload header suppression mask to identify one or more bits in the payload header for which an associated byte string is to be suppressed. Next, the associated byte string for each of the identified bits are suppressed to generate a suppressed packet payload header. Finally, a payload header suppression index is added to the suppressed packet payload header.