Patents by Inventor Shane Nowell

Shane Nowell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220066639
    Abstract: An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to perform operations comprising opening a block family associated with the memory device; initialize a timer associated with the block family; assigning a plurality of cursors to the block family; responsive to programming a first block associated with a first cursor of the memory device, associating the first block with the block family; responsive to programming a second block associated with a second cursor of the memory device, associating the second block with the block family; and responsive to detecting expiration of the timer, closing the block family.
    Type: Application
    Filed: November 5, 2020
    Publication date: March 3, 2022
    Inventors: Michael Sheperek, Bruce A. Liikanen, Peter Feeley, Larry J. Koudele, Shane Nowell, Steven Michael Kientz
  • Patent number: 11263134
    Abstract: A set of two or more block families associated with a first voltage bin are selected. Each block family includes two or more pages of a memory device that have been programmed within a corresponding time window. The set of two or more block families includes a first block family and a second block family. Values of a data state metric for each of the set of block families is determined. A first voltage for the first block family and a second voltage for the second block family is determined based on the values of the data state metric. In response to a determination that a difference between the first voltage and the second voltage satisfies a block family combination criterion, the second block family is merged with the first block family.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: March 1, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Michael Sheperek, Larry J. Koudele, Mustafa N. Kaynak, Shane Nowell
  • Patent number: 11231863
    Abstract: An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to initialize a block family associated with a memory device; initialize a timeout associated with the block family; initializing a low temperature and a high temperature using a reference temperature at the memory device; responsive to programming a block residing on the memory device, associate the block with the block family; and responsive to at least one of: detecting expiration of the timeout or determining that a difference between the high temperature and the low temperature is greater than or equal to a specified threshold temperature value, close the block family.
    Type: Grant
    Filed: February 25, 2020
    Date of Patent: January 25, 2022
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Michael Sheperek, Kishore Kumar Muchherla, Mustafa N. Kaynak, Vamsi Pavan Rayaprolu, Bruce A. Liikanen, Peter Feeley, Larry J. Koudele, Shane Nowell, Steven Michael Kientz
  • Patent number: 11221912
    Abstract: A processing device reads data from a memory device in response to a received request and performs a first error control operation on the data based on an initial operating characteristic to correct one or more errors in the data. The processing device determines that the first error control operation based on the initial operating characteristic failed to correct the one or more errors in the data, modifies the initial operating characteristic to generate a modified operating characteristic and performs a second error control operation on the data based on the modified operating characteristic to correct the one or more errors in the data.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: January 11, 2022
    Assignee: Micron Technology, Inc.
    Inventors: Vamsi Pavan Rayaprolu, Sivagnanam Parthasarathy, Sampath K. Ratnam, Shane Nowell, Renato C. Padilla
  • Publication number: 20210397232
    Abstract: A processing device in a memory sub-system stores data at a first voltage level in a memory cell in a first segment of the memory sub-system, and determines a temperature change between a current temperature associated with the memory cell and a new temperature. The processing device further determines a voltage level read from the memory cell at the new temperature, determines a difference between the voltage level read from the memory cell and the first voltage level, and determines a temperature compensation value based on the difference between the voltage level read from the memory cell and the first voltage level in view of the temperature change.
    Type: Application
    Filed: September 8, 2021
    Publication date: December 23, 2021
    Inventors: Shane Nowell, Sampath K. Ratnam, Vamsi Pavan Rayaprolu
  • Publication number: 20210397233
    Abstract: An operating temperature of a memory sub-system is identified. It is determined whether the operating temperature satisfies a first temperature condition associated with a threshold temperature. Upon determining that the operating temperature satisfies the first temperature condition, one or more operations are performed on at least one data block at a memory component of the memory sub-system until the operating temperature changes to satisfy a second temperature condition associated with the threshold temperature. The one or more operations are selected to be performed based on a difference between the operating temperature and the threshold temperature.
    Type: Application
    Filed: September 3, 2021
    Publication date: December 23, 2021
    Inventors: Shane Nowell, Sivagnanam Parthasarathy
  • Patent number: 11163488
    Abstract: An indication of a programming temperature at which data is written at a first location of the memory component is received. If it is indicated that the programming temperature is outside of a temperature range associated with the memory component, the data written to the first location of the memory component is re-written to a second location of the memory component when an operating temperature of the memory component returns within the temperature range.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: November 2, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Vamsi Pavan Rayaprolu, Sampath K. Ratnam, Sivagnanam Parthasarathy, Mustafa N. Kaynak, Kishore Kumar Muchherla, Shane Nowell, Peter Feeley, Qisong Lin
  • Publication number: 20210311649
    Abstract: At least one data of a set of data stored at a memory cell of a memory component is determined to be associated with an unsuccessful error correction operation. A determination is made as to whether a programming operation associated with the set of data stored at the memory cell has completed. The at least one data of the set of data stored at the memory cell that is associated with the unsuccessful error correction operation is recovered in response to determining that the programming operation has completed. Another memory cell of the memory component is identified in response to recovering the at least one data of the set of data stored at the memory cell that is associated with the unsuccessful error correction operation. The set of data including the recovered at least one data is provided to the other memory cell of the memory component.
    Type: Application
    Filed: June 17, 2021
    Publication date: October 7, 2021
    Inventors: Sampath K. Ratnam, Vamsi Pavan Rayaprolu, Mustafa N. Kaynak, Sivagnanam Parthasarathy, Kishore Kumar Muchherla, Shane Nowell, Peter Feeley, Qisong Lin
  • Patent number: 11137808
    Abstract: A processing device in a memory system receives a data access request identifying a memory cell in a first segment of the memory system comprising at least a portion of at least one memory device. The processing device determines a temperature difference between a current temperature associated with the memory cell and a baseline temperature of the memory system and identifies a temperature compensation value specific to the first segment of the memory system, the temperature compensation value corresponding to the temperature difference. The processing device adjusts, based on an amount represented by the temperature compensation value, an access control voltage applied to the memory cell.
    Type: Grant
    Filed: August 31, 2018
    Date of Patent: October 5, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Shane Nowell, Sampath K. Ratnam, Vamsi Pavan Rayaprolu
  • Patent number: 11132037
    Abstract: An operating temperature of a memory sub-system is identified. It is determined that the identified operating temperature satisfies a first temperature condition. Upon determining that the identified operating temperature satisfies the first temperature condition, operations are performed at the memory sub-system until the operating temperature changes to satisfy a second temperature condition.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: September 28, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Shane Nowell, Sivagnanam Parthasarathy
  • Patent number: 11068186
    Abstract: At least one data of a set of data stored at a memory cell of a memory component is determined to be associated with an unsuccessful error correction operation. A determination is made as to whether a programming operation associated with the set of data stored at the memory cell has completed. The at least one data of the set of data stored at the memory cell that is associated with the unsuccessful error correction operation is recovered in response to determining that the programming operation has completed. Another memory cell of the memory component is identified in response to recovering the at least one data of the set of data stored at the memory cell that is associated with the unsuccessful error correction operation. The set of data including the recovered at least one data is provided to the other memory cell of the memory component.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: July 20, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Sampath K. Ratnam, Vamsi Pavan Rayaprolu, Mustafa N. Kaynak, Sivagnanam Parthasarathy, Kishore Kumar Muchherla, Shane Nowell, Peter Feeley, Qisong Lin
  • Patent number: 11056198
    Abstract: A processing device in a memory system determines that a first metric of a first memory unit on a first plane of a memory device satisfies a first threshold criterion. The processing device further determines whether a second metric of a second memory unit on a second plane of the memory device satisfies a second threshold criterion, wherein the second block is associated with the first block, and wherein the second threshold criterion is lower than the first threshold criterion. Responsive to the second metric satisfying the second threshold criterion, the processing device performs a multi-plane data integrity operation to determine a first reliability statistic for the first memory unit and a second reliability statistic for the second memory unit in parallel.
    Type: Grant
    Filed: January 13, 2020
    Date of Patent: July 6, 2021
    Assignee: Micron Technology, Inc.
    Inventors: Kishore Kumar Muchherla, Ashutosh Malshe, Harish R. Singidi, Shane Nowell, Vamsi Pavan Rayaprolu, Sampath K. Ratnam
  • Publication number: 20210191617
    Abstract: An example memory sub-system includes a memory device and a processing device, operatively coupled to the memory device. The processing device is configured to initialize a block family associated with a memory device; initialize a timeout associated with the block family; initializing a low temperature and a high temperature using a reference temperature at the memory device; responsive to programming a block residing on the memory device, associate the block with the block family; and responsive to at least one of: detecting expiration of the timeout or determining that a difference between the high temperature and the low temperature is greater than or equal to a specified threshold temperature value, close the block family.
    Type: Application
    Filed: February 25, 2020
    Publication date: June 24, 2021
    Inventors: Michael Sheperek, Kishore Kumar Muchherla, Mustafa N. Kaynak, Vamsi Pavan Rayaprolu, Bruce A. Liikanen, Peter Feeley, Larry J. Koudele, Shane Nowell, Steven Michael Kientz
  • Publication number: 20210109805
    Abstract: A determination that a programming operation has been performed on a memory cell can be made. An amount of time that has elapsed since the programming operation has been performed on the memory cell can be identified. A determination as to whether the amount of time that has elapsed satisfies a threshold time condition can be made. In response to determining that the amount of time that has elapsed satisfies the threshold time condition an operation can be performed on the memory cell to change or maintain a voltage condition of the memory cell.
    Type: Application
    Filed: December 21, 2020
    Publication date: April 15, 2021
    Inventors: Vamsi Pavan Rayaprolu, Kishore Kumar Muchherla, Peter Feeley, Sampath K. Ratnam, Sivagnanam Parthasarathy, Qisong Lin, Shane Nowell, Mustafa N. Kaynak
  • Patent number: 10872009
    Abstract: A number of operations that have been performed on one or more memory cells that are proximate to a particular memory cell of the memory component can be identified. A determination as to whether the particular memory cell has transitioned from a state associated with a decreased error rate to another state associated with an increased error rate can be made based on the identified number of operations. In response to determining that the particular memory cell has transitioned from the state associated with the decreased error rate to the another state associated with the increased error rate, an operation can be performed on the particular memory cell to transition the particular memory cell from the another state associated with the increased error rate to the state associated with the decreased error rate.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: December 22, 2020
    Assignee: Micron Technology, Inc.
    Inventors: Vamsi Pavan Rayaprolu, Kishore Kumar Muchherla, Peter Feeley, Sampath K. Ratnam, Sivagnanam Parthasarathy, Qisong Lin, Shane Nowell, Mustafa N. Kaynak
  • Publication number: 20200348881
    Abstract: A processing device, operatively coupled with a memory device, is configured to identify a temperature related to a memory device of a plurality of memory devices; to determine, whether the temperature satisfies a threshold temperature condition; responsive to detecting that the temperature related to the memory device satisfies the threshold temperature condition, to identify an entry associated with the memory device from a plurality of entries in a data structure, wherein each entry of the plurality of entries corresponds to one of the plurality of memory devices; to determine a parameter value associated with the memory device from the entry, wherein the parameter value is for a programming operation to store data at the memory device; to adjust the parameter value associated with the memory device to generate an adjusted parameter value; and to store the adjusted parameter value in the entry of the data structure.
    Type: Application
    Filed: July 15, 2020
    Publication date: November 5, 2020
    Inventors: Mustafa N Kaynak, Sampath K. Ratnam, Zixiang Loh, Nagendra Prasad Ganesh Rao, Larry K. Koudele, Vamsi Pavan Rayaprolu, Patrick R. Khayat, Shane Nowell
  • Patent number: 10732890
    Abstract: A temperature related to a memory device is identified. It is determined whether the temperature related to the memory device satisfies a threshold temperature condition. Responsive to detecting that the temperature related to the memory device satisfies the threshold temperature condition, a parameter for a programming operation is adjusted from a first value to a second value to store data at the memory device.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: August 4, 2020
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Mustafa N. Kaynak, Sampath K. Ratnam, Zixiang Loh, Nagendra Prasad Ganesh Rao, Larry J. Koudele, Vamsi Pavan Rayaprolu, Patrick R. Khayat, Shane Nowell
  • Publication number: 20200201710
    Abstract: A processing device reads data from a memory device in response to a received request and performs a first error control operation on the data based on an initial operating characteristic to correct one or more errors in the data. The processing device determines that the first error control operation based on the initial operating characteristic failed to correct the one or more errors in the data, modifies the initial operating characteristic to generate a modified operating characteristic and performs a second error control operation on the data based on the modified operating characteristic to correct the one or more errors in the data.
    Type: Application
    Filed: February 27, 2020
    Publication date: June 25, 2020
    Inventors: Vamsi Pavan Rayaprolu, Sivagnanam Parthasarathy, Sampath K. Ratnam, Shane Nowell, Renato C. Padilla
  • Patent number: 10685725
    Abstract: A temperature associated with the memory component is determined. A frequency to perform an operation on a memory cell associated with the memory component is determined based on the temperature associated with the memory component. The operation is performed on the memory cell at the determined frequency to transition the memory cell from a state associated with an increased error rate for data stored at the memory cell to another state associated with a decreased error rate for the data stored at the memory cell.
    Type: Grant
    Filed: July 17, 2019
    Date of Patent: June 16, 2020
    Assignee: MICRON TECHNOLOGY, INC.
    Inventors: Sampath K. Ratnam, Vamsi Pavan Rayaprolu, Mustafa N. Kaynak, Peter Feeley, Kishore Kumar Muchherla, Renato C. Padilla, Shane Nowell
  • Publication number: 20200152280
    Abstract: A processing device in a memory system determines that a first metric of a first memory unit on a first plane of a memory device satisfies a first threshold criterion. The processing device further determines whether a second metric of a second memory unit on a second plane of the memory device satisfies a second threshold criterion, wherein the second block is associated with the first block, and wherein the second threshold criterion is lower than the first threshold criterion. Responsive to the second metric satisfying the second threshold criterion, the processing device performs a multi-plane data integrity operation to determine a first reliability statistic for the first memory unit and a second reliability statistic for the second memory unit in parallel.
    Type: Application
    Filed: January 13, 2020
    Publication date: May 14, 2020
    Inventors: Kishore Kumar Muchherla, Ashutosh Malshe, Harish R. Singidi, Shane Nowell, Vamsi Pavan Rayaprolu, Sampath K. Ratnam