Abstract: An input and output circuit of an integrated circuit chip for exchanging signals between logic circuits of the integrated circuit chip and a system. The input and output circuit includes a plurality of power rings for providing a plurality of power sources, a plurality of input and output pads for transmitting signals, a sequence of input and output cells for transmitting signals, and a plurality of electrostatic discharge protection cells deposited within the sequence of input and output cells for performing electrostatic discharge protection for the input and output cells, wherein the plurality of electrostatic discharge protection cells are not coupled to any input and output pads.

Abstract: A method for programming a routing layout design through one via layer includes forming a plurality of metal traces on a first routing layer and a second routing layer, and positioning a plurality of vias within a via layer disposed between the first and second routing layers for connecting the metal traces on the first and second routing layers according to a first current route defined by a predetermined circuit layout design to connect a first node and a second node so as to establish a second current route equivalent to the first current route.

Abstract: An input and output circuit of an integrated circuit chip for exchanging signals between logic circuits of the integrated circuit chip and a system. The input and output circuit includes a plurality of power rings for providing a plurality of power sources, a plurality of input and output pads for transmitting signals, a sequence of input and output cells for transmitting signals, and a plurality of electrostatic discharge protection cells deposited within the sequence of input and output cells for performing electrostatic discharge protection for the input and output cells, wherein the plurality of electrostatic discharge protection cells are not coupled to any input and output pads.

Abstract: A method for forming a metal programmable integrated circuit that can use a plurality of clock sources and balance clock skew. The integrated circuit has a semiconductor body. The method includes step (a) used for forming a plurality of basic units on the semiconductor body wherein each basic unit has at least a logic module, at least a driving module, and at least a storage module, and step (b) used for forming a metal layer for programming the logic module to be able to perform logic operations, programming the driving module to able to drive an input signal inputted into the driving module, and programming the storage module to be able to store data after performing step (a).

Abstract: A method for programming a routing layout design through one via layer includes forming a plurality of metal traces on a first routing layer and a second routing layer, and positioning a plurality of vias within a via layer disposed between the first and second routing layers for connecting the metal traces on the first and second routing layers according to a first current route defined by a predetermined circuit layout design to connect a first node and a second node so as to establish a second current route equivalent to the first current route.

Abstract: A method for forming a metal programmable integrated circuit that can use a plurality of clock sources and balance clock skew. The integrated circuit has a semiconductor body. The method includes step (a) used for forming a plurality of basic units on the semiconductor body wherein each basic unit has at least a logic module, at least a driving module, and at least a storage module, and step (b) used for forming a metal layer for programming the logic module to be able to perform logic operations, programming the driving module to able to drive an input signal inputted into the driving module, and programming the storage module to be able to store data after performing step (a).