Patents by Inventor Shang-Koon NA

Shang-Koon NA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for fabricating semiconductor device including silicon-containing layer and metal-containing layer, and conductive structure of the same
    Patent number: 9418891
    Abstract: A method for fabricating a semiconductor device includes forming a silicon-containing layer; forming a metal-containing layer over the silicon-containing layer; forming an undercut prevention layer between the silicon containing layer and the metal containing layer; etching the metal-containing layer; and forming a conductive structure by etching the undercut prevention layer and the silicon-containing layer.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: August 16, 2016
    Assignee: SK Hynix Inc.
    Inventors: Kyong-Bong Rouh, Shang-Koon Na, Yong-Seok Eun, Su-Ho Kim, Tae-Han Kim, Mi-Ri Lee
  • CMOS circuit and method for fabricating the same
    Patent number: 9318390
    Abstract: A semiconductor device includes a semiconductor substrate and a gate insulation layer formed over the semiconductor substrate. A gate electrode is formed over the gate insulation layer. The gate electrode includes a silicon-containing electrode including a dopant, a capturing material to capture the dopant, and an activation control material to control an activation of the dopant.
    Type: Grant
    Filed: February 10, 2015
    Date of Patent: April 19, 2016
    Assignee: SK Hynix Inc.
    Inventors: Kyong-Bong Rouh, Shang-Koon Na, Mi-Ri Lee, Hun-Sung Lee
  • METHOD FOR FABRICATING SEMICONDUCTOR DEVICE INCLUDING SILICON-CONTAINING LAYER AND METAL-CONTAINING LAYER, AND CONDUCTIVE STRUCTURE OF THE SAME
    Publication number: 20160093527
    Abstract: A method for fabricating a semiconductor device includes forming a silicon-containing layer; forming a metal-containing layer over the silicon-containing layer; forming an undercut prevention layer between the silicon containing layer and the metal containing layer; etching the metal-containing layer; and forming a conductive structure by etching the undercut prevention layer and the silicon-containing layer.
    Type: Application
    Filed: December 8, 2015
    Publication date: March 31, 2016
    Inventors: Kyong-Bong ROUH, Shang-Koon NA, Yong-Seok EUN, Su-Ho KIM, Tae-Han KIM, Mi-Ri LEE
  • Method for fabricating semiconductor device including silicon-containing layer and metal-containing layer, and conductive structure of the same
    Patent number: 9236263
    Abstract: A method for fabricating a semiconductor device includes forming a silicon-containing layer; forming a metal-containing layer over the silicon-containing layer; forming an undercut prevention layer between the silicon containing layer and the metal containing layer; etching the metal-containing layer; and forming a conductive structure by etching the undercut prevention layer and the silicon-containing layer.
    Type: Grant
    Filed: December 18, 2012
    Date of Patent: January 12, 2016
    Assignee: SK Hynix Inc.
    Inventors: Kyong-Bong Rouh, Shang-Koon Na, Yong-Seok Eun, Su-Ho Kim, Tae-Han Kim, Mi-Ri Lee
  • CMOS CIRCUIT AND METHOD FOR FABRICATING THE SAME
    Publication number: 20150155207
    Abstract: A semiconductor device includes a semiconductor substrate and a gate insulation layer formed over the semiconductor substrate. A gate electrode is formed over the gate insulation layer. The gate electrode includes a silicon-containing electrode including a dopant, a capturing material to capture the dopant, and an activation control material to control an activation of the dopant.
    Type: Application
    Filed: February 10, 2015
    Publication date: June 4, 2015
    Inventors: Kyong-Bong ROUH, Shang-Koon NA, Mi-Ri LEE, Hun-Sung LEE
  • CMOS circuit and method for fabricating the same
    Patent number: 8981486
    Abstract: A semiconductor device includes a semiconductor substrate and a gate insulation layer formed over the semiconductor substrate. A gate electrode is formed over the gate insulation layer. The gate electrode includes a silicon-containing electrode including a dopant, a capturing material to capture the dopant, and an activation control material to control an activation of the dopant.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: March 17, 2015
    Assignee: SK Hynix Inc.
    Inventors: Kyong-Bong Rouh, Shang-Koon Na, Mi-Ri Lee, Hun-Sung Lee
  • CMOS CIRCUIT AND METHOD FOR FABRICATING THE SAME
    Publication number: 20140183650
    Abstract: A semiconductor device includes a semiconductor substrate and a gate insulation layer formed over the semiconductor substrate. A gate electrode is formed over the gate insulation layer. The gate electrode includes a silicon-containing electrode including a dopant, a capturing material to capture the dopant, and an activation control material to control an activation of the dopant.
    Type: Application
    Filed: March 18, 2013
    Publication date: July 3, 2014
    Applicant: SK HYNIX INC.
    Inventors: Kyong-Bong ROUH, Shang-Koon NA, Mi-Ri LEE, Hun-Sung LEE
  • METHOD FOR FABRICATING SEMICONDUCTOR DEVICE INCLUDING SILICON-CONTAINING LAYER AND METAL-CONTAINING LAYER, AND CONDUCTIVE STRUCTURE OF THE SAME
    Publication number: 20140030884
    Abstract: A method for fabricating a semiconductor device includes forming a silicon-containing layer; forming a metal-containing layer over the silicon-containing layer; forming an undercut prevention layer between the silicon containing layer and the metal containing layer; etching the metal-containing layer; and forming a conductive structure by etching the undercut prevention layer and the silicon-containing layer.
    Type: Application
    Filed: December 18, 2012
    Publication date: January 30, 2014
    Applicant: SK HYNIX INC.
    Inventors: Kyong-Bong ROUH, Shang-Koon NA, Yong-Seok EUN, Su-Ho KIM, Tae-Han KIM, Mi-Ri LEE