Abstract: A circuit includes a memory cell column coupled to a bit line pair and a write circuit that alternately biases a first end of the bit lines toward power supply and reference voltage levels in a write operation. Each of first and second switching circuits at second ends of the bit lines includes first and second logic circuits, each including an input terminal coupled to a corresponding bit line, and first and second switching devices, each including a gate coupled to the corresponding logic circuit. The first logic circuit and switching device couple the corresponding bit line to a power supply node simultaneously with the write circuit biasing the corresponding bit line toward the power supply voltage level, and the second logic circuit and switching device couple the corresponding bit line to a reference node simultaneously with the write circuit biasing the corresponding bit line toward the reference voltage level.

Abstract: An integrated circuit includes a flip-flop circuit and a gating circuit. The flip-flop circuit is arranged to receive an input data for generating a master signal during a writing mode according to a first clock signal and a second clock signal, and to output an output data according to the first clock signal and the second clock signal during a storing mode. The gating circuit is arranged for generating the first clock signal and the second clock signal according to the master signal and an input clock signal. When the input clock signal is at a signal level, the first clock signal and the second clock signal are at different logic levels. When the input clock signal is at another signal level, the first clock signal and the second clock signal are at a same logic level determined according to a signal level of the master signal.

Abstract: Various embodiments of the present disclosure are directed towards a microelectromechanical systems (MEMS) package comprising a wire-bond damper. A housing structure overlies a support substrate, and a MEMS structure is between the support substrate and the housing structure. The MEMS structure comprises an anchor, a spring, and a movable mass. The spring extends from the anchor to the movable mass to suspend and allow movement of the movable mass in a cavity between the support substrate and the housing structure. The wire-bond damper is on the movable mass or structure surrounding the movable mass. For example, the wire-bond damper may be on a top surface of the movable mass. As another example, the wire-bond damper may be on the support substrate, laterally between the anchor and the movable mass. Further, the wire-bond damper comprises a wire formed by wire bonding and configured to dampen shock to the movable mass.

Abstract: Provided herein are compositions, systems, kits, and methods for treating nervous system injuries caused by trauma or neurodegeneration or aging in a subject by administering a CSPG or SOCS3 reduction peptide (CRP and SRP respectively), or a nucleic acid sequence encoding the CRP or SRP, wherein both the CRP and SRP comprise a cell membrane penetrating domain, and a lysosome targeting domain, and the CRP further comprises a chondroitin sulfate proteoglycan (CSPG) binding domain, and the SRP further comprises a suppressor of cytokine signaling-3 (SOCS3) binding domain.

Abstract: A battery connection module is provided. The battery connection module is adapted to connect a plurality of batteries, the battery connection module includes a plurality of busbars and a single layer wiring flexible circuit board. The plurality of busbars are used to connect a plurality of batteries in series. The single layer wiring flexible circuit board has multiple connector connecting points positioned to a front end portion thereof and a multiple traces, front ends of the multiple traces are respectively connected to the multiple connector connecting points, and rear end connecting points of some of the multiple traces are electrically and mechanically connected to the plurality of busbars, the multiple traces includes at least one rounding trace and at least one rounded trace, the rounding trace rounds the rear end connecting point of the rounded trace so as to round from one side of the at least one rounded trace to the other side of the at least one rounded trace.

Abstract: The present disclosure relates to a battery connection module and a battery device. The battery connection module includes a carrying tray, a plurality of busbars and a flexible circuit board. The plurality of busbars are provided to the carrying tray.

Abstract: The present disclosure provides an electronic wearable device. The electronic wearable device includes a first module having a first contact and a second module having a second contact. The first contact is configured to keep electrical connection with the second contact in moving with respect to each other during a wearing period.

Abstract: CD93 functional domains for use in treating osteoporosis. A method of alleviating, reducing, suppressing, and/or treating an osteoclast-related bone disease is disclosed. The method comprises administering a therapeutically effective amount of an isolated recombinant protein comprising an amino acid sequence that is at least 80% identical to human Cluster of Differentiation 93 protein domain 1 to a subject in need thereof, the recombinant protein lacking amino acid residues 1 to 21, transmembrane and cytoplasmic domains of the human CD93 (SEQ ID NO: 3) and having a total length of no more than 559 amino acid residues. In one embodiment, the osteoclast-related bone disease is at least one selected from the group consisting of osteoporosis, postmenopausal osteoporosis, osteopenia, bone loss, inflammatory bone loss, and any combination thereof. In another embodiment, the recombinant protein comprises the amino acid sequence of SEQ ID NO: 1 or SEQ ID NO: 2.

Abstract: An optical element driving mechanism is provided. The optical element driving mechanism includes a movable portion, a fixed portion, a driving assembly, and an assist assembly. The movable portion is used for connecting to an optical element having a main axis. The movable portion is movable relative to the fixed portion. The driving assembly drives the movable portion to move relative to the fixed portion. The assist assembly limits the movement of the movable portion relative to the fixed portion.

Abstract: A method of forming a FinFET is disclosed. The method includes depositing a conductive material across each of a number of adjacent fins, depositing a sacrificial mask over the conductive material, patterning the conductive material with the sacrificial mask to form a plurality of conductive material segments, depositing a sacrificial layer over the sacrificial mask, and patterning the sacrificial layer, where a portion of the patterned sacrificial layer remains over the sacrificial mask, where a portion of the sacrificial mask is exposed, and where the exposed portion of the sacrificial mask extends across each of the adjacent fins. The method also includes removing the portion of the sacrificial layer over the sacrificial mask, after removing the portion of the sacrificial layer over the sacrificial mask, removing the sacrificial mask, epitaxially growing a plurality of source/drain regions from the semiconductor substrate, and electrically connecting the source/drain regions to other devices.

Abstract: A wireless modem and an operation method thereof are provided. The operation method of the wireless modem includes the following steps. A communication signal is buffered in a storage unit when the communication signal is received. The communication signal is a paging early indicator (PEI) signal, a paging signal or a radio resource management (RRM) signal. A synchronization procedure is performed, when a reference signal is received. The communication signal is fetched from the storage unit, when the synchronization procedure is finished. A compensation procedure is performed on the communication signal. The communication signal which is compensated is demodulated.

Abstract: A system and method for storing data associated with a system management interrupt (SMI) in a computer system. Notification of a system management interrupt is received on a central processing unit. The central processing unit enters a system management mode. A system management handler of a basic input output system (BIOS) is executed by a bootstrap processor of the central processing unit. The system management interrupt is initiated via the bootstrap processor. The system management interrupt data is stored in a register of the bootstrap processor. The SMI data is converted to an accessible format. The converted SMI data is stored in a memory.

Abstract: A power managing system and method are provided. When an under voltage lockout circuit determines that a common voltage of the power managing system is lower than a first lockout voltage, the under voltage lockout circuit outputs a first under voltage lockout signal for controlling one of a plurality of power converters that supplies a highest output voltage to rapidly reduce its output voltage to a zero value. Then, the under voltage lockout circuit outputs a second under voltage lockout signal for controlling another one of the power converters that supplies a lowest output voltage to gradually reduce its output voltage to the zero value.

Abstract: A barbecue grill apparatus includes a first folding plate, a second folding plate, a rotating connector and a first heater. The first folding plate has a first top part, a first middle part and a first bottom part. The second folding plate has a second top part, a second middle part and a second bottom part. The rotating connector connects the first bottom part and the second bottom part for the first folding plate and the second folding plate to rotate along the rotating connector to spread with a first angle to be an open mode and to rotate along the rotating connector to collapse with a second angle to a close mode. In the open mode, a grill bracket is placed between the first folding plate and the second folding plate. The first heater placed in the first middle part to emit heat toward the grill bracket.

Abstract: Disclosed herein are related to memory device including an adaptive word line control circuit. In one aspect, the memory device includes a memory cell and a word line driver coupled to the memory cell through a word line. In one aspect, the memory device includes an adaptive word line control circuit including two or more diodes connected in series, where one of the two or more diodes is coupled to the word line.

Abstract: An optical sensing device includes a device casing and an optical sensor on the device casing. In an embodiment, the optical sensing device further includes an image-capturing device on the device casing. The sensing direction of the optical sensor and the capturing direction of the image-capturing device point in the same direction. The image-capturing device can capture an image of an object to be sensed by the optical sensor. In another embodiment, the optical sensing device further includes a flexible shielding cover on the device casing and enclosing the optical sensor for shielding the optical sensor from external light.

Abstract: A system and method for storing data associated with a system management interrupt (SMI) in a computer system. Notification of a system management interrupt is received on a central processing unit. The central processing unit enters a system management mode. A system management handler of a basic input output system (BIOS) is executed by a bootstrap processor of the central processing unit. The system management interrupt is initiated via the bootstrap processor. The system management interrupt data is stored in a register of the bootstrap processor. The SMI data is converted to an accessible format. The converted SMI data is stored in a memory.

Abstract: A semiconductor device and a manufacturing method of the semiconductor device are provided. The semiconductor device includes a substrate, a first silicon nitride (SiN) layer, a second SiN layer, an oxide insulation layer, and a first metal oxide layer. The first SiN layer is located on or above the substrate. The second SiN layer is located above the first SiN layer. Both the first SiN layer and the second SiN layer include a hydrogen element. The second SiN layer has a hydrogen concentration lower than that of the first SiN layer and a thickness less than that of the first SiN layer. The oxide insulation layer is located on the second SiN layer. The first metal oxide layer is located on the oxide insulation layer. The second SiN layer is located between the first metal oxide layer and the substrate.

Abstract: An active device substrate includes a substrate, a first thin film transistor located above the substrate and a second thin film transistor located above the substrate. The first thin film transistor includes a first metal oxide layer, a first gate, a first source and a first drain. A first gate dielectric layer and a second gate dielectric layer are located between the first gate and the first metal oxide layer. The second thin film transistor includes a second metal oxide layer, a second gate, a second source and a second drain. The second gate dielectric layer is located between the second gate and the second metal oxide layer, and the second metal oxide layer is located between the first gate dielectric layer and the second gate dielectric layer. The first gate and the second gate belong to a same patterned layer.

Abstract: A power managing system and method are provided. When an under voltage lockout circuit determines that a common voltage of the power managing system is lower than a first lockout voltage, the under voltage lockout circuit outputs a first under voltage lockout signal for controlling one of a plurality of power converters that supplies a highest output voltage to rapidly reduce its output voltage to a zero value. Then, the under voltage lockout circuit outputs a second under voltage lockout signal for controlling another one of the power converters that supplies a lowest output voltage to gradually reduce its output voltage to the zero value.