Patents by Inventor Shang-Rong WU

Shang-Rong WU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230140646
    Abstract: A semiconductor structure and a method of forming the semiconductor structure are provided. The method of forming the semiconductor structure includes forming a floating gate layer on a substrate. A trench is formed in the floating gate layer and the substrate. A first dielectric layer is formed in the trench. A second dielectric layer is formed on the first dielectric layer. A third dielectric layer is formed on the second dielectric layer. A first sacrificial layer is formed on the third dielectric layer. A dielectric stack is formed on the first sacrificial layer. A control gate layer is formed on the dielectric stack. The first sacrificial layer is removed to form an air gap between the third dielectric layer and the dielectric stack.
    Type: Application
    Filed: November 3, 2021
    Publication date: May 4, 2023
    Inventors: Shang-Rong WU, Ming-Che LIN, Chung-Hsien LIU
  • Patent number: 10614908
    Abstract: A method for fixing outlier bits is provided in the invention. The method is applied to a memory device, and a memory array of the memory device is divided into a plurality of blocks. The method includes the steps of setting an initial voltage and a terminal voltage of a margin read (MGRD) operation in each block, wherein the initial voltage is set in a distribution of a threshold voltage of each block; finding a MGRD spec corresponding to each block at a range defined by the initial voltage and the terminal voltage; detecting outlier bits in each block according to the MGRD spec corresponding to each block; and fixing the outlier bits in each block.
    Type: Grant
    Filed: March 6, 2019
    Date of Patent: April 7, 2020
    Assignee: Winbond Electronics Corp.
    Inventors: Shang-Rong Wu, Shang-Wen Chang
  • Publication number: 20190348142
    Abstract: A method for fixing outlier bits is provided in the invention. The method is applied to a memory device, and a memory array of the memory device is divided into a plurality of blocks. The method includes the steps of setting an initial voltage and a terminal voltage of a margin read (MGRD) operation in each block, wherein the initial voltage is set in a distribution of a threshold voltage of each block; finding a MGRD spec corresponding to each block at a range defined by the initial voltage and the terminal voltage; detecting outlier bits in each block according to the MGRD spec corresponding to each block; and fixing the outlier bits in each block.
    Type: Application
    Filed: March 6, 2019
    Publication date: November 14, 2019
    Inventors: Shang-Rong WU, Shang-Wen CHANG