Patents by Inventor Shang-Wei Tu

Shang-Wei Tu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10810337
    Abstract: A method for modeling glitch of a logic gate is provided. An input glitch with a glitch width is obtained from the logic gate. The glitch width is scaled by a first scaling factor when the glitch width is greater than or equal to a first threshold width. The glitch width is scaled by a second scaling factor when the glitch width is less than the first threshold width and greater than or equal to a second threshold width. An output glitch with the scaled glitch width is provided for the logic gate. The scaled glitch width is greater than 0. The first threshold width is greater than the second threshold width, and the second scaling factor is smaller than the first scaling factor.
    Type: Grant
    Filed: September 6, 2018
    Date of Patent: October 20, 2020
    Assignee: MEDIATEK SINGAPORE PTE. LTD.
    Inventors: Jeff Chijung Peng, Jiu-Shang Yang, Shang-Wei Tu
  • Patent number: 9298869
    Abstract: A method for showing hierarchical structure for a given power intent described in a power intent description language (e.g. a formal power intent description language) with a design described in a hardware design description language, an associated apparatus, and an associated computer program product are provided, where the method includes: retrieving hardware design description contents written in the hardware design description language from a hardware design description file, and retrieving power intent description contents written in the power intent description language from a power intent description file; and controlling a display module to display a power domain hierarchy associated with the power intent description contents and the hardware design description contents respectively retrieved from the power intent description file and the hardware design description file, wherein the power domain hierarchy includes at least one power domain.
    Type: Grant
    Filed: May 22, 2014
    Date of Patent: March 29, 2016
    Assignee: MEDIATEK INC.
    Inventor: Shang-Wei Tu
  • Publication number: 20150178417
    Abstract: A method for showing hierarchical structure for a given power intent described in a power intent description language (e.g. a formal power intent description language) with a design described in a hardware design description language, an associated apparatus, and an associated computer program product are provided, where the method includes: retrieving hardware design description contents written in the hardware design description language from a hardware design description file, and retrieving power intent description contents written in the power intent description language from a power intent description file; and controlling a display module to display a power domain hierarchy associated with the power intent description contents and the hardware design description contents respectively retrieved from the power intent description file and the hardware design description file, wherein the power domain hierarchy includes at least one power domain.
    Type: Application
    Filed: May 22, 2014
    Publication date: June 25, 2015
    Applicant: MEDIATEK INC.
    Inventor: Shang-Wei Tu