Patents by Inventor Shang-Yi Chiang

Shang-Yi Chiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7994032
    Abstract: The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a substrate having a front surface and a back surface; a plurality of sensor elements formed on the front surface of the substrate, each of the plurality of sensor elements configured to receive light directed towards the back surface; and an aluminum doped feature formed in the substrate and disposed horizontally between two adjacent elements of the plurality of sensor elements and vertically between the back surface and the plurality of sensor elements.
    Type: Grant
    Filed: July 28, 2010
    Date of Patent: August 9, 2011
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Yi Chiang, Chung Wang, Shou-Gwo Wuu, Dun-Nian Yaung
  • Publication number: 20100289102
    Abstract: The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a substrate having a front surface and a back surface; a plurality of sensor elements formed on the front surface of the substrate, each of the plurality of sensor elements configured to receive light directed towards the back surface; and an aluminum doped feature formed in the substrate and disposed horizontally between two adjacent elements of the plurality of sensor elements and vertically between the back surface and the plurality of sensor elements.
    Type: Application
    Filed: July 28, 2010
    Publication date: November 18, 2010
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shang-Yi CHIANG, Chung WANG, Shou-Gwo WUU, Dun-Nian YAUNG
  • Patent number: 7791170
    Abstract: The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a substrate having a front surface and a back surface; a plurality of sensor elements formed on the front surface of the substrate, each of the plurality of sensor elements configured to receive light directed towards the back surface; and an aluminum doped feature formed in the substrate and disposed horizontally between two adjacent elements of the plurality of sensor elements and vertically between the back surface and the plurality of sensor elements.
    Type: Grant
    Filed: July 10, 2006
    Date of Patent: September 7, 2010
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Shang-Yi Chiang, Chung Wang, Shou-Gwo Wuu, Dun-Nian Yaung
  • Publication number: 20080014673
    Abstract: The present disclosure provides an image sensor semiconductor device. The semiconductor device includes a substrate having a front surface and a back surface; a plurality of sensor elements formed on the front surface of the substrate, each of the plurality of sensor elements configured to receive light directed towards the back surface; and an aluminum doped feature formed in the substrate and disposed horizontally between two adjacent elements of the plurality of sensor elements and vertically between the back surface and the plurality of sensor elements.
    Type: Application
    Filed: July 10, 2006
    Publication date: January 17, 2008
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shang-Yi CHIANG, Chung WANG, Shou-Gwo WUU, Dun-Nian YAUNG
  • Patent number: 5480811
    Abstract: A photosensing array and a method of making the same wherein the array includes a semiconductor substrate having collecting regions and recrystallized regions. Each collecting region is operatively associated with a photosensing element. Adjacent collecting regions are separated by a recrystallized region. The recrystallized regions are formed by thermally migrating doping metal into the semiconductor substrate using thermal zone gradient melting. With respect to the collecting regions, the recrystallized regions have a relative conductivity level or a conductivity type such that the recrystallized regions have the property of impeding photogenerated carrier migration from one collecting region to an adjacent collecting region. Preferably, the doping metal is one having a high absorption coefficient to block passage of photons between adjacent collecting regions.
    Type: Grant
    Filed: April 30, 1992
    Date of Patent: January 2, 1996
    Inventors: Shang-Yi Chiang, John Moll
  • Patent number: 5252143
    Abstract: A pre-processed substrate structure for a semiconductor device. A subcollector layer is spaced apart from a substrate by a dielectric. A relatively small, lightly-doped epitaxial feed-through layer extends through the dielectric between the substrate and the subcollector. A transistor constructed over the subcollector has very low collector-to-substrate capacitance. A plurality of devices on a common substrate are electrically isolated from each other by channel stops formed in the substrate around each device.
    Type: Grant
    Filed: February 18, 1992
    Date of Patent: October 12, 1993
    Assignee: Hewlett-Packard Company
    Inventors: Shang-Yi Chiang, Theodore I. Kamins
  • Patent number: 5144403
    Abstract: This invention pertains to a self-aligned, trench-isolated emitter structure and the method for forming same. The emitter structure comprises a portion of a bipolar transistor which exhibits improved function due to the emitter structure. A single layer of conductive material forms both the emitter and base contacts in the transistor structure, which structure has particularly shallow emitter and base junctions (about 0.15 micrometer or less). The self-aligned emitter contact, isolated from the base contact by a dielectric filled trench, permits overall size reduction of the device, whereby junction area and accompanying leakage across junctions is reduced. In addition, when the structure of the bipolar transistor is such that the trench isolates the emitter area from both the base contact and the extrinsic base, it is possible to provide improved base conductivity without generating peripheral transistor effects.
    Type: Grant
    Filed: October 9, 1990
    Date of Patent: September 1, 1992
    Assignee: Hewlett-Packard Company
    Inventors: Shang-yi Chiang, Wen-Ling M. Huang, Clifford I. Drowley, Paul V. Voorde
  • Patent number: 5008210
    Abstract: This invention pertains to a self-aligned trench-isolated emitter structure and the method for forming same. The emitter structure comprises a portion of a bipolar transistor which exhibits improved function due to the emitter structure. A single layer of conductive material forms both the emitter and base contacts in the transistor structure, which structure has particularly shallow emitter and base junctions (about 0.15 micrometer or less). The self-aligned emitter contact, isolated from the base contact by a dielectric filled trench, permits overall size reduction of the device, whereby junction area and accompanying leakage across junctions is reduced. In addition, when the structure of the bipolar transistor is such that the trench isolates the emitter area from both the base contact and the extrinsic base, it is possible to provide improved base conductivity without generating peripheral transistor effects.
    Type: Grant
    Filed: April 18, 1990
    Date of Patent: April 16, 1991
    Assignee: Hewlett-Packard Company
    Inventors: Shang-yi Chiang, Wen-Ling M. Huang, Clifford I. Drowley, Paul V. Voorde
  • Patent number: 4249967
    Abstract: A small-area light-emitting diode of the surface-emitting type has a double heterojunction semiconductor structure grown on a substrate. A semiconductor blocking layer having a hole formed therein is disposed between the substrate and the layers of the double heterojunction semiconductor structure to confine the transverse current flow for greater efficiency. A metallic contact layer is formed on the surface of the double heterojunction semiconductor structure on the side opposite the substrate and has a registering hole formed therein having a size approximately equal to the size of the hole formed in the semiconductor blocking layer and disposed in registration therewith along an axis perpendicular to the layers. The cap layer of the double heterojunction semiconductor structure may include a hole etched therethrough and in registration with the previously mentioned holes for better light emission.
    Type: Grant
    Filed: December 26, 1979
    Date of Patent: February 10, 1981
    Assignee: International Telephone and Telegraph Corporation
    Inventors: Yet-Zen Liu, Shang-Yi Chiang
  • Patent number: 4220960
    Abstract: A small-area light-emitting diode of the surface-emitting type has a double heterojunction semiconductor structure grown on a substrate. A semiconductor blocking layer having a hole formed therein is disposed between the substrate and the layers of the double heterojunction semiconductor structure to confine the transverse current flow for greater efficiency. A metallic contact layer is formed on the surface of the double heterojunction semiconductor structure on the side opposite the substrate and has a registering hole formed therein having a size approximately equal to the size of the hole formed in the semiconductor blocking layer and disposed in registration therewith along an axis perpendicular to the layers. The cap layer of the double heterojunction semiconductor structure may include a hole etched therethrough and in registration with the previously mentioned holes for better light emission.
    Type: Grant
    Filed: October 25, 1978
    Date of Patent: September 2, 1980
    Assignee: International Telephone and Telegraph Corporation
    Inventors: Yet-Zen Liu, Shang-Yi Chiang
  • Patent number: 4173496
    Abstract: An integrated, monolithic array of solar cells wherein isolation between cells permits series interconnection of the cells to provide an output voltage for the array equal to the sum of the voltages of the unit cells. Although normal PN junction isolation is ineffective when exposed to light, the present structure includes a form of junction isolation that is effective when exposed to light, or to other radiation. For example, a band of heavily doped P-type silicon, formed by thermomigration of aluminum through an N-type wafer, provides such isolation.
    Type: Grant
    Filed: May 30, 1978
    Date of Patent: November 6, 1979
    Assignee: Texas Instruments Incorporated
    Inventors: Shang-Yi Chiang, Bernard G. Carbajal
  • Patent number: 4133698
    Abstract: A solar cell having first and second closely spaced, parallel P-N junctions is fabricated, wherein the illuminated surface is totally free of metallization, i.e., the junction nearest the illuminated surface is not electrically connected, and thereby participates only indirectly in the collection of photo-generated carriers by providing a charge field to suppress the front surface recombination and to enhance collection at the back side junction. All metallization is on the back side, which preferably includes an interposed finger pattern of N+ and P+ zones.
    Type: Grant
    Filed: December 27, 1977
    Date of Patent: January 9, 1979
    Assignee: Texas Instruments Incorporated
    Inventors: Shang-Yi Chiang, Bernard G. Carbajal