Abstract: A self-powered electronic shelf label (ESL), comprising: a processing circuitry; a display communicatively coupled to the processing circuitry; a communication circuit communicatively coupled to the processing circuitry, wherein the communication circuit is configured to receive and transmit data from a control device; and a power manager connected to the processing circuitry, the display, an energy storage, and a plurality of photovoltaic (PV) cells, the power manager including a maximum power point tracker (MPPT) circuit, wherein the MPPT circuit is configured to continuously determine a maximum power point of the PV cells, wherein the power manager is configured to connect, based on the determined maximum power point, at least a portion of the plurality of PV cells to a load such that the plurality of PV cells produce a voltage equal to the continuously determined maximum power point.

Abstract: A microchip structure and a method for manufacturing thereof are provided. The microchip structure comprises a target integrated circuit (TIC) comprising a first surface and a first power contact at a first location on the first surface of the TIC, the TIC further comprising a second power contact at a second location on the first surface of the TIC; a plurality of photovoltaic (PV) diodes deposited on a first surface of a transparent substrate, each of the PV diodes having an anode coupled to an anode contact and a cathode coupled to a cathode contact, the transparent substrate is transparent to an electromagnetic frequency to which the PV diodes are sensitive; the cathode contact of a first PV diode of the PV diodes is bonded to the first power contact and the anode contact of a second PV diode of the PV diodes is bonded to the second power contact.

Abstract: A self-powered electronic shelf label (ESL), comprising: a processing circuitry; a display communicatively coupled to the processing circuitry; a communication circuit communicatively coupled to the processing circuitry, wherein the communication circuit is configured to receive and transmit data from a control device; and a power manager connected to the processing circuitry, the display, an energy storage, and a plurality of photovoltaic (PV) cells, the power manager including a maximum power point tracker (MPPT) circuit, wherein the MPPT circuit is configured to continuously determine a maximum power point of the PV cells, wherein the power manager is configured to connect, based on the determined maximum power point, at least a portion of the plurality of PV cells to a load such that the plurality of PV cells produce a voltage equal to the continuously determined maximum power point.

Abstract: A microchip structure and a method for manufacturing thereof are provided. The microchip structure comprises a target integrated circuit (TIC) comprising a first surface and a first power contact at a first location on the first surface of the TIC, the TIC further comprising a second power contact at a second location on the first surface of the TIC; a plurality of photovoltaic (PV) diodes deposited on a first surface of a transparent substrate, each of the PV diodes having an anode coupled to an anode contact and a cathode coupled to a cathode contact, the transparent substrate is transparent to an electromagnetic frequency to which the PV diodes are sensitive; the cathode contact of a first PV diode of the PV diodes is bonded to the first power contact and the anode contact of a second PV diode of the PV diodes is bonded to the second power contact.

Abstract: A device having a plurality of thin film photovoltaic cells (PV) formed over a passivation layer. The device comprises a plurality of thin film photovoltaic (PV) cells formed over the passivation layer, each PV cell includes at least a lower conducting layer (LCL) and an upper conducting layer (UCL); and a conducting path connecting at least a UCL of a first PV cell to at least a LCL of a second PV cell, wherein at least a first array of PV cells comprised of at least a first portion of the plurality of PV cells is connected by the respective UCL and LCL of each PV cell to provide a first voltage output. In an embodiment the passivation layer is formed over a target integrated circuit (TIC), the TIC having a top surface and a bottom surface.

Abstract: A system for energy harvesting comprises a first interface for receiving energy from at least one renewable energy source (ERS); a second interface coupled to at least one load circuit; a third interface coupled to an least one primary energy storage (PES); a DC-to-DC converter connected to one of a single inductor and a single capacitor; a switching circuitry connected to the first, second, and third interfaces and the DC-to-DC converter; a control unit connected to the DC-to-DC converter and the switching circuitry, the control unit controls the system to operate in an operation mode including any one of: provide energy from the ERS to the at least one load via the DC-to-DC converter, charge the least one PES from the at least one ERS via the DC-to-DC converter, and provide energy from the at least one PES to the at least one load circuit via the DC-to-DC converter.

Abstract: An integrated circuit (IC) comprises a plurality of photovoltaic (PV) cells formed over a passivation layer of a target integrated circuit (TIC), wherein at least one PV cell of the plurality of PV cells is usable as a light sensing device; an interface to an energy storage unit; the TIC comprising at least: a control unit; and a switching circuit, the switching circuit coupled to the plurality of PV cells, the energy storage, and the control unit; wherein the control unit is configured to control at least the switching circuit to configure a connection scheme, wherein the connection scheme devises at least one first PV cell of the plurality of PV cells to connect to the energy storage and at least one second PV cell to connect to the control unit for light detection.

Abstract: A device having a plurality of thin film photovoltaic cells (PV) formed over a passivation layer. The device comprises a plurality of thin film photovoltaic (PV) cells formed over the passivation layer, each PV cell includes at least a lower conducting layer (LCL) and an upper conducting layer (UCL); and a conducting path connecting at least a UCL of a first PV cell to at least a LCL of a second PV cell, wherein at least a first array of PV cells comprised of at least a first portion of the plurality of PV cells is connected by the respective UCL and LCL of each PV cell to provide a first voltage output. In an embodiment the passivation layer is formed over a target integrated circuit (TIC), the TIC having a top surface and a bottom surface.

Abstract: A system and method for fabricating a self-powering integrated circuit chip having an integrated circuit, which may be a MEMS or CMOS device or the like and a thin film photovoltaic cell stack overlayed thereupon or on the opposite side of the substrate on which the IC is manufactured upon.

Abstract: A target integrated circuit (TIC) having a top conductive layer (TCL) that may be connected to a plurality of cells that are further integrated over the TIC. Each of the plurality of cells comprises two conductive layers, a lower conductive layer (LCL) below the cell and an upper conductive layer (UCL) above the cell. Both conductive layers may connect to the TCL of the TIC to form a super IC structure combined of the TIC and the plurality of cells connected thereto. Accordingly, conductivity between the TIC as well as auxiliary circuitry to the TIC maybe achieved.

Abstract: An integrated circuit (IC) combination of a target integrated circuit (TIC) and a plurality of thin film photovoltaic cells (PV) connected thereto. The IC comprises a target integrated circuit (TIC) having a top surface and a bottom surface; a plurality of thin film photovoltaic (PV) cells formed over at least one of the top surface and the bottom surface of the TIC, each PV cell includes at least a lower conducting layer (LCL) and an upper conducting layer (UCL); and a conducting path connecting at least a UCL of a first PV cell to at least a LCL of a second PV cell, wherein at least a first array of PV cells comprised of at least a first portion of the plurality of PV cells is connected by the respective UCL and LCL of each PV cell to provide a first voltage output.

Abstract: An integrated circuit (IC) comprises a plurality of photovoltaic (PV) cells formed over a passivation layer of a target integrated circuit (TIC), wherein at least one PV cell of the plurality of PV cells is usable as a light sensing device; an interface to an energy storage unit; the TIC comprising at least: a control unit; and a switching circuit, the switching circuit coupled to the plurality of PV cells, the energy storage, and the control unit; wherein the control unit is configured to control at least the switching circuit to configure a connection scheme, wherein the connection scheme devises at least one first PV cell of the plurality of PV cells to connect to the energy storage and at least one second PV cell to connect to the control unit for light detection.

Abstract: A system for energy harvesting comprises a first interface for receiving energy from at least one renewable energy source (ERS); a second interface coupled to at least one load circuit; a third interface coupled to an least one primary energy storage (PES); a DC-to-DC converter connected to one of a single inductor and a single capacitor; a switching circuitry connected to the first, second, and third interfaces and the DC-to-DC converter; a control unit connected to the DC-to-DC converter and the switching circuitry, the control unit controls the system to operate in an operation mode including any one of: provide energy from the ERS to the at least one load via the DC-to-DC converter, charge the least one PES from the at least one ERS via the DC-to-DC converter, and provide energy from the at least one PES to the at least one load circuit via the DC-to-DC converter.

Abstract: An integrated circuit (IC) combination of a target integrated circuit (TIC) and a plurality of thin film photovoltaic cells (PV) connected thereto. The IC comprises a target integrated circuit (TIC) having a top surface and a bottom surface; a plurality of thin film photovoltaic (PV) cells formed over at least one of the top surface and the bottom surface of the TIC, each PV cell includes at least a lower conducting layer (LCL) and an upper conducting layer (UCL); and a conducting path connecting at least a UCL of a first PV cell to at least a LCL of a second PV cell, wherein at least a first array of PV cells comprised of at least a first portion of the plurality of PV cells is connected by the respective UCL and LCL of each PV cell to provide a first voltage output.

Abstract: A target integrated circuit (TIC) having a top conductive layer (TCL) that may be connected to a plurality of cells that are further integrated over the TIC. Each of the plurality of cells comprises two conductive layers, a lower conductive layer (LCL) below the cell and an upper conductive layer (UCL) above the cell. Both conductive layers may connect to the TCL of the TIC to form a super IC structure combined of the TIC and the plurality of cells connected thereto. Accordingly, conductivity between the TIC as well as auxiliary circuitry to the TIC maybe achieved.

Abstract: A system and method for fabricating a self-powering integrated circuit chip having an integrated circuit, which may be a MEMS or CMOS device or the like and a thin film photovoltaic cell stack overlayed thereupon or on the opposite side of the substrate on which the IC is manufactured upon.