Patents by Inventor Shanie GEORGE

Shanie GEORGE has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11790150
    Abstract: A system and method for placement and simulation of a cell in proximity to a cell with a diffusion break is herein disclosed. According to one embodiment, an integrated circuit is designed to include a first cell that has a first edge and a second edge opposite the first edge. The first cell may also include a diffusion region that extends from the first edge to the second edge with a diffusion break separating the diffusion region. The diffusion break may be spaced away from the second edge by a distance that degrades a metric (e.g., a delay, a slew, dynamic power, or leakage) of a second cell placed next to the second edge beyond a threshold level.
    Type: Grant
    Filed: June 14, 2022
    Date of Patent: October 17, 2023
    Assignee: Synopsys, Inc.
    Inventors: Deepak Dattatraya Sherlekar, Shanie George
  • Publication number: 20230274064
    Abstract: On-the-fly multi-bit flip-flop (MBFF) generation is provided by selecting at least two flip-flop blocks from a plurality of candidate flip-flop blocks; identifying a control block from a plurality of candidate control blocks, the control block being identified based on operational specifications of the selected flip-flop blocks; and generating a multi-bit flip-flop instance based on the selected flip-flop blocks and the identified control block.
    Type: Application
    Filed: May 8, 2023
    Publication date: August 31, 2023
    Inventors: Deepak D. SHERLEKAR, Basannagouda REDDY, Shanie GEORGE
  • Patent number: 11681848
    Abstract: On-the-fly multi-bit flip-flop (MBFF) generation is provided by selecting at least two flip-flop blocks from a plurality of candidate flip-flop blocks; identifying a control block from a plurality of candidate control blocks, the control block being identified based on operational specifications of the selected flip-flop blocks; and generating a multi-bit flip-flop instance based on the selected flip-flop blocks and the identified control block.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: June 20, 2023
    Assignee: Synopsys, Inc.
    Inventors: Deepak D. Sherlekar, Basannagouda Reddy, Shanie George
  • Publication number: 20220309223
    Abstract: A system and method for placement and simulation of a cell in proximity to a cell with a diffusion break is herein disclosed. According to one embodiment, an integrated circuit is designed to include a first cell that has a first edge and a second edge opposite the first edge. The first cell may also include a diffusion region that extends from the first edge to the second edge with a diffusion break separating the diffusion region. The diffusion break may be spaced away from the second edge by a distance that degrades a metric (e.g., a delay, a slew, dynamic power, or leakage) of a second cell placed next to the second edge beyond a threshold level.
    Type: Application
    Filed: June 14, 2022
    Publication date: September 29, 2022
    Inventors: Deepak Dattatraya Sherlekar, Shanie George
  • Patent number: 11403454
    Abstract: A system and method for placement and simulation of a cell in proximity to a cell with a diffusion break is herein disclosed. According to one embodiment, an integrated circuit is designed to include a first cell that has a first edge and a second edge opposite the first edge. The first cell may also include a diffusion region that extends from the first edge to the second edge with a diffusion break separating the diffusion region. The diffusion break may be spaced away from the second edge by a distance that degrades a metric (e.g., a delay, a slew, dynamic power, or leakage) of a second cell placed next to the second edge beyond a threshold level.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: August 2, 2022
    Assignee: Synopsys, Inc.
    Inventors: Deepak Dattatraya Sherlekar, Shanie George
  • Publication number: 20220171912
    Abstract: Poly-bit cells and methods for forming the same are provided. In one example, a method for forming a poly-bit cell includes identifying layouts in a library of single-bit cells having one or more of a different functionality and a different drive that are combinable; storing, in memory, layouts that are combinable; and creating layouts of poly-bit cells from the stored combinable single-bit cells. Each poly-bit cell combined from layouts of at least two single-bit cells has one or more of a different functionality and a different drive.
    Type: Application
    Filed: November 30, 2021
    Publication date: June 2, 2022
    Inventors: Deepak Dattatraya SHERLEKAR, Shanie GEORGE, Shi CHEN, Vahe HARUTYUNYAN
  • Publication number: 20220147690
    Abstract: A system and method for placement and simulation of a cell in proximity to a cell with a diffusion break is herein disclosed. According to one embodiment, an integrated circuit is designed to include a first cell that has a first edge and a second edge opposite the first edge. The first cell may also include a diffusion region that extends from the first edge to the second edge with a diffusion break separating the diffusion region. The diffusion break may be spaced away from the second edge by a distance that degrades a metric (e.g., a delay, a slew, dynamic power, or leakage) of a second cell placed next to the second edge beyond a threshold level.
    Type: Application
    Filed: November 9, 2020
    Publication date: May 12, 2022
    Inventors: Deepak Dattatraya Sherlekar, Shanie George
  • Publication number: 20210357567
    Abstract: On-the-fly multi-bit flip-flop (MBFF) generation is provided by selecting at least two flip-flop blocks from a plurality of candidate flip-flop blocks; identifying a control block from a plurality of candidate control blocks, the control block being identified based on operational specifications of the selected flip-flop blocks; and generating a multi-bit flip-flop instance based on the selected flip-flop blocks and the identified control block.
    Type: Application
    Filed: May 12, 2021
    Publication date: November 18, 2021
    Inventors: Deepak D. SHERLEKAR, Basannagouda REDDY, Shanie GEORGE