Patents by Inventor Shankar Venkataraman

Shankar Venkataraman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040161903
    Abstract: A method of filling a gap defined by adjacent raised features on a substrate includes providing a flow of a silicon-containing processing gas to a chamber housing the substrate and providing a flow of an oxidizing gas to the chamber. The method also includes depositing a first portion of a film as a substantially conformal layer in the gap by causing a reaction between the silicon-containing processing gas and the oxidizing gas. Depositing the conformal layer includes varying over time a ratio of the (silicon-containing processing gas):(oxidizing gas) and regulating the chamber to a pressure in a range from about 200 torr to about 760 torr throughout deposition of the conformal layer. The method also includes depositing a second portion of the film as a bulk layer.
    Type: Application
    Filed: January 14, 2004
    Publication date: August 19, 2004
    Applicant: APPLIED MATERIALS, INC.
    Inventors: Zheng Yuan, Reza Arghavani, Shankar Venkataraman
  • Publication number: 20040156390
    Abstract: A method of processing Ethernet signals for transport in an optical network system is disclosed. The method includes encapsulating Ethernet frames into EFP frames comprising a length header, a converged data link header, and a data area, and mapping the EFP frames into byte synchronous paths. The converged data link header replaces an Ethernet preamble of the Ethernet packet.
    Type: Application
    Filed: February 12, 2003
    Publication date: August 12, 2004
    Applicant: Cisco Technology, Inc.
    Inventors: Sharat Prasad, Marinica Rusu, Hiroshi Suzuki, Shankar Venkataraman, Stefano Binetti, Luca Della Chiesa
  • Publication number: 20040144490
    Abstract: The present invention is a method and apparatus for cleaning a chemical vapor deposition (CVD) chamber using cleaning gas energized to a plasma in a gas mixing volume separated by an electrode from a reaction volume of the chamber. In one embodiment, a source of RF power is coupled to a lid of the chamber, while a switch is used to couple a showerhead to ground terminals or the source of RF power.
    Type: Application
    Filed: January 27, 2003
    Publication date: July 29, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Maosheng Zhao, Juan Carlos Rocha-Alvarez, Inna Shmurun, Soova Sen, Mao D. Lim, Shankar Venkataraman, Ju-Hyung Lee
  • Publication number: 20040139983
    Abstract: A method and apparatus for cleaning a processing chamber are provided. The cleaning method includes the use of a remote plasma source to generate reactive species and an in situ RF power to generate or regenerate reactive species. The reactive species are generated from a carbon and fluorine-containing gas and an oxygen source.
    Type: Application
    Filed: January 16, 2003
    Publication date: July 22, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Annamalai Lakshmanan, Ju-Hyung Lee, Troy Kim, Maosheng Zhao, Shankar Venkataraman
  • Publication number: 20040118519
    Abstract: A method and apparatus for distributing gases into a processing chamber. In one embodiment, the apparatus includes a gas distribution plate defining a plurality of holes disposed therethrough, a blocker plate defining a plurality of holes disposed therethrough, a first gas pathway configured to deliver a first gas through the blocker plate and the gas distribution plate, and a second gas pathway configured to deliver a second gas around the blocker plate and through the gas distribution plate.
    Type: Application
    Filed: December 20, 2002
    Publication date: June 24, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Soovo Sen, Maosheng Zhao, Inna Shmurun, Ju-Hyung Lee, Shankar Venkataraman
  • Publication number: 20040099281
    Abstract: A method for cleaning a plasma enhanced chemical vapor deposition chamber. The method includes introducing a cleaning gas into the plasma enhanced chemical vapor deposition chamber, forming a plasma using a very high frequency (VHF) power having a frequency in a range from about 20 MHz to about 100 MHz, and reacting the cleaning gas with deposits within the chamber in the presence of the plasma.
    Type: Application
    Filed: November 22, 2002
    Publication date: May 27, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Juan Carlos Rocha-Alvarez, Maosheng Zhao, Shankar Venkataraman
  • Publication number: 20040082193
    Abstract: A method of depositing a low dielectric constant film on a substrate. In one embodiment, the method includes the steps of positioning the substrate in a deposition chamber, providing a gas mixture to the deposition chamber, in which the gas mixture is comprised of one or more cyclic organosilicon compounds, one or more aliphatic compounds and one or more oxidizing gases. The method further includes reacting the gas mixture in the presence of an electric field to form the low dielectric constant film on the semiconductor substrate. The electric field is generated using a very high frequency power having a frequency in a range of about 20 MHz to about 100 MHz.
    Type: Application
    Filed: October 23, 2002
    Publication date: April 29, 2004
    Applicant: Applied Materials, Inc
    Inventors: Juan Carlos Rocha-Alvarez, Maosheng Zhao, Ying Yu, Shankar Venkataraman, Srinivas D. Nemani, Li-Qun Xia
  • Publication number: 20040055636
    Abstract: The invention provides a method and apparatus to control fluids such as process gases into two or more substrate process chambers. In one aspect, the gas flow from a first supply to a first processing region is used to control the gas flow of a second supply to a second processing region where the total gas flow is about equal to the total of the gas flows into both the first and second processing regions. In another aspect, the gas flow rate from the first supply for the first processing region is about equal to the gas flow rate for the second supply to the second processing region.
    Type: Application
    Filed: July 15, 2003
    Publication date: March 25, 2004
    Applicant: APPLIED MATERIALS INC.
    Inventors: Juan Carlos Rocha-Alvarez, Chen-An Chen, Shankar Venkataraman
  • Patent number: 6709721
    Abstract: The present invention provides a method of depositing a carbon doped silicon oxide film having a low dielectric constant (k). A process gas mixture containing at least a carrier gas, an oxidizer, a carbon gas source, or combinations thereof, is supplied adjacent an edge of a substrate though a purge gas inlet in a substrate support to facilitate deposition of low k carbon doped silicon oxide film having a greater concentration of silicon oxide around the edge of the substrate than an inner portion of the substrate.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: March 23, 2004
    Assignee: Applied Materials Inc.
    Inventors: Juan Carlos Rocha-Alvarez, Chen-An Chen, Ellie Yieh, Shankar Venkataraman
  • Publication number: 20040050492
    Abstract: An apparatus for distributing gas in a processing system. In one embodiment, the system includes a gas distribution assembly having a gas distribution plate. The gas distribution plate defines a plurality of holes through which gases are transmitted. The assembly further includes a gas box coupled to the gas distribution plate, in which the gas box is configured to supply the gases into the plurality of holes. The assembly further includes a means for reducing heat transfer from the gas box to the gas distribution plate.
    Type: Application
    Filed: September 16, 2002
    Publication date: March 18, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Lun Tsuei, Soovo Sen, Ju-Hyung Lee, Juan Carlos Rocha-Alvarez, Inna Shmurun, Maosheng Zhao, Troy Kim, Shankar Venkataraman
  • Publication number: 20040052969
    Abstract: A method for processing a substrate. The method includes introducing one or more precursors into a chemical vapor deposition chamber through a gas distribution plate heated by a heating mechanism disposed at a bottom plate of the gas distribution plate, reacting the precursors to deposit a material on a substrate surface, removing the substrate from the chamber, introducing a cleaning gas into the chamber through the gas distribution plate, and reacting the cleaning gas with deposits within the chamber until substantially all the deposits are consumed.
    Type: Application
    Filed: September 16, 2002
    Publication date: March 18, 2004
    Applicant: Applied Materials, Inc.
    Inventors: Ju-Hyung Lee, Troy Kim, Soovo Sen, Juan Carlos Rocha-Alvarez, Lun Tsuei, Annamalai Lakshmanan, Maosheng Zhao, Inna Shmurun, Shankar Venkataraman
  • Publication number: 20030192568
    Abstract: Methods and apparatus for cleaning deposition chambers are presented. The cleaning methods include the use of a remote plasma source to generate reactive species from a cleaning gas to clean deposition chambers. A flow of helium or argon may be used during chamber cleaning. Radio frequency power may also be used in combination with a remote plasma source to clean deposition chambers.
    Type: Application
    Filed: April 12, 2002
    Publication date: October 16, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Yi Zheng, Vinita Singh, Srinivas D. Nemani, Chen-An Chen, Ju-Hyung Lee, Shankar Venkataraman
  • Publication number: 20030148020
    Abstract: A method of forming a silicon carbide layer for use in integrated circuits is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a nitrogen source in the presence of an electric field. The as-deposited silicon carbide layer incorporates nitrogen therein from the nitrogen source.
    Type: Application
    Filed: February 25, 2003
    Publication date: August 7, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Francimar Campana, Srinivas Nemani, Michael Chapin, Shankar Venkataraman
  • Publication number: 20030148223
    Abstract: A method of forming a silicon carbide layer for use in integrated circuits is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a nitrogen source in the presence of an electric field. The as-deposited silicon carbide layer incorporates nitrogen therein from the nitrogen source.
    Type: Application
    Filed: February 25, 2003
    Publication date: August 7, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Francimar Campana, Srinivas Nemani, Michael Chapin, Shankar Venkataraman
  • Patent number: 6591850
    Abstract: The invention provides a method and apparatus to control fluids such as process gases into two or more substrate process chambers. In one aspect, the gas flow from a first supply to a first processing region is used to control the gas flow of a second supply to a second processing region where the total gas flow is about equal to the total of the gas flows into both the first and second processing regions. In another aspect, the gas flow rate from the first supply for the first processing region is about equal to the gas flow rate for the second supply to the second processing region.
    Type: Grant
    Filed: June 29, 2001
    Date of Patent: July 15, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Juan Carlos Rocha-Alvarez, Chen-An Chen, Shankar Venkataraman
  • Publication number: 20030129827
    Abstract: Methods are provided for depositing an oxygen-doped dielectric layer. The oxygen-doped dielectric layer may be used for a barrier layer or a hardmask. In one aspect, a method is provided for processing a substrate including positioning the substrate in a processing chamber, introducing a processing gas comprising an oxygen-containing organosilicon compound, carbon dioxide, or combinations thereof, and an oxygen-free organosilicon compound to the processing chamber, and reacting the processing gas to deposit an oxygen-doped dielectric material on the substrate, wherein the dielectric material has an oxygen content of about 15 atomic percent or less. The oxygen-doped dielectric material may be used as a barrier layer in damascene or dual damascene applications.
    Type: Application
    Filed: July 15, 2002
    Publication date: July 10, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Ju-Hyung Lee, Ping Xu, Shankar Venkataraman, Li-Qun Xia, Fei Han, Ellie Yieh, Srinivas D. Nemani, Kangsub Yim, Farhad K. Moghadam, Ashok K. Sinha, Yi Zheng
  • Publication number: 20030104708
    Abstract: A low dielectric constant film having silicon-carbon bonds and dielectric constant of about 3.0 or less, preferably about 2.5 or less, is provided. The low dielectric constant film is deposited by reacting a cyclic organosilicon compound and an aliphatic organosilicon compound with an oxidizing gas while applying RF power. The carbon content of the deposited film is between about 10 and about 30 atomic percent excluding hydrogen atoms, and is preferably between about 10 and about 20 atomic percent excluding hydrogen atoms.
    Type: Application
    Filed: November 22, 2002
    Publication date: June 5, 2003
    Applicant: Applied Materials, Inc.
    Inventors: Seon-Mee Cho, Peter Wai-Man Lee, Chi-I Lang, Dian Sugiarto, Chen-An Chen, Li-Qun Xia, Shankar Venkataraman, Ellie Yieh
  • Patent number: 6537733
    Abstract: A method of forming a silicon carbide layer for use in integrated circuits is provided. The silicon carbide layer is formed by reacting a gas mixture comprising a silicon source, a carbon source, and a nitrogen source in the presence of an electric field. The as-deposited silicon carbide layer incorporates nitrogen therein from the nitrogen source.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: March 25, 2003
    Assignee: Applied Materials, Inc.
    Inventors: Francimar Campana, Srinivas Nemani, Michael Chapin, Shankar Venkataraman
  • Publication number: 20030046495
    Abstract: A streamlined cache coherency protocol system and method for a multiple processor single chip device. There are three primary memory unit (e.g., a cache line) states ( modified, shared, and invalid) and three intermediate memory unit pending states. The pending states are used by the present invention to prevent race conditions that may develop during the completion of a transaction. The pending states “lock out” the memory unit (e.g., prevent access by other agents to a cache line) whose state is in transition between two primary states, thus ensuring coherency protocol correctness. Transitions between states are governed by a series of request and reply or acknowledgment messages. The memory unit is placed in a pending state while appropriate measures are taken to ensure access takes place at an appropriate time. For example, a modification occurs only when other agents can not access the particular memory unit (e.g., a cache line).
    Type: Application
    Filed: August 28, 2001
    Publication date: March 6, 2003
    Inventors: Padmanabha I. Venkitakrishnan, Shankar Venkataraman, Stuart C. Siu
  • Publication number: 20030023794
    Abstract: A cache coherent multiple processor integrated circuit. The circuit includes a plurality of processor units. The processor units are each provided with a cache unit. An embedded RAM unit is included for storing instructions and data for the processor units. A cache coherent bus is coupled to the processor units and the embedded RAM unit. The bus is configured to provide cache coherent snooping commands to enable the processor units to ensure cache coherency between their respective cache units and the embedded RAM unit. The multiple processor integrated circuit can further include an input output unit coupled to the bus to provide input and output transactions for the processor units. The bus is configured to provide split transactions for the processor units coupled to the bus, providing better bandwidth utilization of the bus. The bus can be configured to transfer an entire cache line for the cache units of the processor units in a single clock cycle, wherein the bus is 256 bits wide.
    Type: Application
    Filed: July 26, 2001
    Publication date: January 30, 2003
    Inventors: Padmanabha I. Venkitakrishnan, Shankar Venkataraman, Paul Keltcher, Stuart C. Siu, Stephen E. Richardson, Gary Lee Vondran