Patents by Inventor Shanker R. Nagesh

Shanker R. Nagesh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10679690
    Abstract: In one embodiment, an apparatus comprises a processor core and a power control unit. The power control unit is to identify the occurrence of a power loss from a primary power source, instruct the I/O controller to block further write requests from the one or more I/O devices and to send at least one pending write request stored by the I/O controller to the memory controller, and instruct the memory controller to complete at least one pending write request stored by the memory controller and to cause the memory to be placed into a self-refresh mode.
    Type: Grant
    Filed: November 9, 2018
    Date of Patent: June 9, 2020
    Assignee: Intel Corporation
    Inventors: Samantha J. Edirisooriya, Shanker R. Nagesh, K L Siva Prasad Gadey N V, Blaine R. Monson, Pankaj Kumar
  • Publication number: 20190147938
    Abstract: In one embodiment, an apparatus comprises a processor core and a power control unit. The power control unit is to identify the occurrence of a power loss from a primary power source, instruct the I/O controller to block further write requests from the one or more I/O devices and to send at least one pending write request stored by the I/O controller to the memory controller, and instruct the memory controller to complete at least one pending write request stored by the memory controller and to cause the memory to be placed into a self-refresh mode.
    Type: Application
    Filed: November 9, 2018
    Publication date: May 16, 2019
    Applicant: Intel Corporation
    Inventors: Samantha J. Edirisooriya, Shanker R. Nagesh, K L Siva Prasad Gadey N V, Blaine R. Monson, Pankaj Kumar
  • Patent number: 10127968
    Abstract: In one embodiment, an apparatus comprises a processor core and a power control unit. The power control unit is to identify the occurrence of a power loss from a primary power source, instruct the I/O controller to block further write requests from the one or more I/O devices and to send at least one pending write request stored by the I/O controller to the memory controller, and instruct the memory controller to complete at least one pending write request stored by the memory controller and to cause the memory to be placed into a self-refresh mode.
    Type: Grant
    Filed: August 3, 2015
    Date of Patent: November 13, 2018
    Assignee: Intel Corporation
    Inventors: Samantha J. Edirisooriya, Shanker R. Nagesh, K L Siva Prasad Gadey N V, Blaine R. Monson, Pankaj Kumar
  • Publication number: 20170040051
    Abstract: In one embodiment, an apparatus comprises a processor core and a power control unit. The power control unit is to identify the occurrence of a power loss from a primary power source, instruct the I/O controller to block further write requests from the one or more I/O devices and to send at least one pending write request stored by the I/O controller to the memory controller, and instruct the memory controller to complete at least one pending write request stored by the memory controller and to cause the memory to be placed into a self-refresh mode.
    Type: Application
    Filed: August 3, 2015
    Publication date: February 9, 2017
    Applicant: Intel Corporation
    Inventors: Samantha J. Edirisooriya, Shanker R. Nagesh, K L Siva Prasad Gadey N V, Blaine R. Monson, Pankaj Kumar