Patents by Inventor Shantanu Mishra

Shantanu Mishra has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12032932
    Abstract: Compiling a high-level synthesis circuit design for simulation includes analyzing, using computer hardware, a kernel specified in a high-level language to detect pointers therein. A determination is made as to which of the pointers are global address space pointers referencing a global address space. The kernel is instrumented by replacing accesses in the kernel to the global address space with calls to wrapper functions for performing the accesses. A simulation kernel is generated that specifies an assembly language version of the kernel as instrumented.
    Type: Grant
    Filed: July 11, 2022
    Date of Patent: July 9, 2024
    Assignee: Xilinx, Inc.
    Inventors: Shantanu Mishra, Hemant Kashyap, Uday Kyatham, Mahesh Attarde, Amit Kasat Kasat
  • Publication number: 20240184616
    Abstract: A thread manager creates multiple threads by to execute a simulation of subsystems of a system-on-chip on multiple processor cores in response to execution of a simulation program. The threads execute multiple cycle-accurate simulation models of the subsystems in parallel in an execution phase of each simulation cycle of a plurality of simulation cycles of the simulation. The threads update interfaces of the simulation models in an update phase of each simulation cycle of the plurality of simulation cycles.
    Type: Application
    Filed: December 6, 2022
    Publication date: June 6, 2024
    Applicant: Xilinx, Inc.
    Inventors: Tharun Kumar Ksheerasagar, Hemant Kashyap, Amit Kasat, Meghana Tripathi, Shantanu Mishra
  • Publication number: 20240012629
    Abstract: Compiling a high-level synthesis circuit design for simulation includes analyzing, using computer hardware, a kernel specified in a high-level language to detect pointers therein. A determination is made as to which of the pointers are global address space pointers referencing a global address space. The kernel is instrumented by replacing accesses in the kernel to the global address space with calls to wrapper functions for performing the accesses. A simulation kernel is generated that specifies an assembly language version of the kernel as instrumented.
    Type: Application
    Filed: July 11, 2022
    Publication date: January 11, 2024
    Applicant: Xilinx, Inc.
    Inventors: Shantanu Mishra, Hemant Kashyap, Uday Kyatham, Mahesh Attarde, Amit Kasat Kasat