Patents by Inventor Shanthanand Kutuva Rabindranath

Shanthanand Kutuva Rabindranath has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11768791
    Abstract: A flattening portal bridge (FPB) is provided to support addressing according to a first addressing scheme and a second, alternative addressing scheme. The FPB comprises a primary side and a secondary side, the primary side connects to a first set of devices addressed according to a first addressing scheme, and the secondary side connects to a second set of devices addressed according to a second addressing scheme. The first addressing scheme uses a unique bus number within a Bus/Device/Function (BDF) address space for each device in the first set of devices, and the second bus addressing scheme uses a unique bus-device number for each device in the second set of devices.
    Type: Grant
    Filed: May 2, 2022
    Date of Patent: September 26, 2023
    Assignee: Intel Corporation
    Inventors: David J. Harriman, Reuven Rozic, Maxim Dan, Prashant Sethi, Robert E. Gough, Shanthanand Kutuva Rabindranath
  • Publication number: 20220334994
    Abstract: A flattening portal bridge (FPB) is provided to support addressing according to a first addressing scheme and a second, alternative addressing scheme. The FPB comprises a primary side and a secondary side, the primary side connects to a first set of devices addressed according to a first addressing scheme, and the secondary side connects to a second set of devices addressed according to a second addressing scheme. The first addressing scheme uses a unique bus number within a Bus/Device/Function (BDF) address space for each device in the first set of devices, and the second bus addressing scheme uses a unique bus-device number for each device in the second set of devices.
    Type: Application
    Filed: May 2, 2022
    Publication date: October 20, 2022
    Applicant: Intel Corporation
    Inventors: David J. Harriman, Reuven Rozic, Maxim Dan, Prashant Sethi, Robert E. Gough, Shanthanand Kutuva Rabindranath
  • Patent number: 11321264
    Abstract: A flattening portal bridge (FPB) is provided to support addressing according to a first addressing scheme and a second, alternative addressing scheme. The FPB comprises a primary side and a secondary side, the primary side connects to a first set of devices addressed according to a first addressing scheme, and the secondary side connects to a second set of devices addressed according to a second addressing scheme. The first addressing scheme uses a unique bus number within a Bus/Device/Function (BDF) address space for each device in the first set of devices, and the second bus addressing scheme uses a unique bus-device number for each device in the second set of devices.
    Type: Grant
    Filed: December 29, 2020
    Date of Patent: May 3, 2022
    Assignee: INTEL CORPORATION
    Inventors: David J. Harriman, Reuven Rozic, Maxim Dan, Prashant Sethi, Robert E. Gough, Shanthanand Kutuva Rabindranath
  • Publication number: 20210232522
    Abstract: A flattening portal bridge (FPB) is provided to support addressing according to a first addressing scheme and a second, alternative addressing scheme. The FPB comprises a primary side and a secondary side, the primary side connects to a first set of devices addressed according to a first addressing scheme, and the secondary side connects to a second set of devices addressed according to a second addressing scheme. The first addressing scheme uses a unique bus number within a Bus/Device/Function (BDF) address space for each device in the first set of devices, and the second bus addressing scheme uses a unique bus-device number for each device in the second set of devices.
    Type: Application
    Filed: December 29, 2020
    Publication date: July 29, 2021
    Applicant: Intel Corporation
    Inventors: David J. Harriman, Reuven Rozic, Maxim Dan, Prashant Sethi, Robert E. Gough, Shanthanand Kutuva Rabindranath
  • Patent number: 10877915
    Abstract: A flattening portal bridge (FPB) is provided to support addressing according to a first addressing scheme and a second, alternative addressing scheme. The FPB comprises a primary side and a secondary side, the primary side connects to a first set of devices addressed according to a first addressing scheme, and the secondary side connects to a second set of devices addressed according to a second addressing scheme. The first addressing scheme uses a unique bus number within a Bus/Device/Function (BDF) address space for each device in the first set of devices, and the second bus addressing scheme uses a unique bus-device number for each device in the second set of devices.
    Type: Grant
    Filed: September 30, 2016
    Date of Patent: December 29, 2020
    Assignee: Intel Corporation
    Inventors: David J. Harriman, Reuven Rozic, Maxim Dan, Prashant Sethi, Robert E. Gough, Shanthanand Kutuva Rabindranath
  • Patent number: 10061707
    Abstract: A first device is determined as connected to a first one of a plurality of ports of a root complex. Addresses are assigned corresponding to a first hierarchy of devices including the first device. A second device is determined as connected through a mapping portal bridge at a second one of the ports of the root complex, the second device included in another second hierarchy of devices. A mapping table is generated that corresponds to the mapping portal bridge. The mapping table defines a translation between addressing used in a first view of a configuration address space of the system and addressing used in a second view of the configuration address space. The first view includes a view of the root complex and the second view includes a view corresponding to the second hierarchy of devices, the first hierarchy of devices being addressed according to the first view.
    Type: Grant
    Filed: March 24, 2016
    Date of Patent: August 28, 2018
    Assignee: Intel Corporation
    Inventors: Shanthanand Kutuva Rabindranath, David J. Harriman, Prashant Sethi, Vijayalakshmi Kothandan
  • Publication number: 20170255582
    Abstract: A flattening portal bridge (FPB) is provided to support addressing according to a first addressing scheme and a second, alternative addressing scheme. The FPB comprises a primary side and a secondary side, the primary side connects to a first set of devices addressed according to a first addressing scheme, and the secondary side connects to a second set of devices addressed according to a second addressing scheme. The first addressing scheme uses a unique bus number within a Bus/Device/Function (BDF) address space for each device in the first set of devices, and the second bus addressing scheme uses a unique bus-device number for each device in the second set of devices.
    Type: Application
    Filed: September 30, 2016
    Publication date: September 7, 2017
    Inventors: David J. Harriman, Reuven Rozic, Maxim Dan, Prashant Sethi, Robert E. Gough, Shanthanand Kutuva Rabindranath
  • Publication number: 20170185525
    Abstract: A first device is determined as connected to a first one of a plurality of ports of a root complex. Addresses are assigned corresponding to a first hierarchy of devices including the first device. A second device is determined as connected through a mapping portal bridge at a second one of the ports of the root complex, the second device included in another second hierarchy of devices. A mapping table is generated that corresponds to the mapping portal bridge. The mapping table defines a translation between addressing used in a first view of a configuration address space of the system and addressing used in a second view of the configuration address space. The first view includes a view of the root complex and the second view includes a view corresponding to the second hierarchy of devices, the first hierarchy of devices being addressed according to the first view.
    Type: Application
    Filed: March 24, 2016
    Publication date: June 29, 2017
    Inventors: Shanthanand Kutuva Rabindranath, David J. Harriman, Prashant Sethi, Vijayalakshmi Kothandan