Abstract: A light-emitting zinc oxide based compound semiconductor device of a double-heterostructure. The double-heterostructure includes a light-emitting layer formed of a low-resistivity Mg1?x?yCdxZnyO; 0?x<1, 0<y?1, and x+y=0.1 to 1 compound semiconductor doped with p-type and/or n-type impurity. A first clad layer is joined to one surface of the light-emitting layer and formed of an n-type zinc oxide compound semiconductor having a composition different from the light-emitting layer. A second clad layer is joined to another surface of the light-emitting layer and formed of a low-resistivity, p-type zinc oxide based semiconductor having a composition different from the light-emitting layer.

Abstract: A disclosed method deposits a p-type magnesium-, cadmium- and/or zinc-oxide-based II-VI Group compound semiconductor crystal layer on a zinc oxide (ZnO) substrate having a (002) crystallographic orientation. The method uses a zinc-containing reaction gas supplied to a surface of a heated substrate. The p-type magnesium-, cadmium- and/or zinc-oxide-based II-VI Group compound semiconductor crystal layer is grown on the heated substrate, while introducing a pressing gas in a transverse direction toward the substrate to press the reaction gas against the entire surface of the substrate.

Abstract: A light-emitting zinc oxide based compound semiconductor device of a double-heterostructure. The double-heterostructure includes a light-emitting layer formed of a low-resistivity Mg1-x-yCdxZnyO; 0?x<1, 0<y?1, and x+y=0.1 to 1 compound semiconductor doped with p-type and/or n-type impurity. A first clad layer is joined to one surface of the light-emitting layer and formed of an n-type zinc oxide compound semiconductor having a composition different from the light-emitting layer. A second clad layer is joined to another surface of the light-emitting layer and formed of a low-resistivity, p-type zinc oxide based semiconductor having a composition different from the light-emitting layer.

Abstract: A method of depositing a p-type magnesium-, cadmium- and/or zinc-oxide-based II-VI Group compound semiconductor crystal layer over a substrate by a metalorganic chemical vapor deposition technique. A reaction gas is supplied to a surface of a heated substrate in a direction parallel or oblique to the substrate. The p-type magnesium-, cadmium- and/or zinc-oxide-based II-VI Group compound semiconductor crystal layer is grown on the heated substrate, while introducing a pressing gas substantially in a vertical direction toward the substrate to press the reaction gas against the entire surface of the substrate.

Abstract: A zinc oxide (ZnO) field effect transistor exhibits large input amplitude by using a gate insulating layer. A channel layer and the gate insulating layer are sequentially laminated on a substrate. A gate electrode is formed on the gate insulating layer. A source contact and a drain contact are disposed at the both sides of the gate contact and are electrically connected to the channel layer via openings. The channel layer is formed from n-type ZnO. The gate insulating layer is made from aluminum nitride/aluminum gallium nitride (AlN/AlGaN) or magnesium zinc oxide (MgZnO), which exhibits excellent insulation characteristics, thus increasing the Schottky barrier and achieving large input amplitude. If the FET is operated in the enhancement mode, it is operable in a manner similar to a silicon metal oxide semiconductor field effect transistor (Si-MOS-type FET), resulting in the formation of an inversion layer.

Abstract: A light-emitting zinc oxide based compound semiconductor device of a double-heterostructure. The double-heterostructure includes a light-emitting layer formed of a low-resistivity Mg1-x-y Cdx Zny O; 0?x<1, 0<y?1, and x+y=0.1 to 1 compound semiconductor doped with p-type and/or n-type impurity. A first clad layer is joined to one surface of the light-emitting layer and formed of an n-type zinc oxide compound semiconductor having a composition different from the light-emitting layer. A second clad layer is joined to another surface of the light-emitting layer and formed of a low-resistivity, p-type zinc oxide based semiconductor having a composition different from the light-emitting layer.

Abstract: A method of depositing a p-type magnesium-, cadmium- and/or zinc-oxide-based II-VI Group compound semiconductor crystal layer over a substrate by a metalorganic chemical vapor deposition technique. A reaction gas is supplied to a surface of a heated substrate in a direction parallel or oblique to the substrate. The p-type magnesium-, cadmium- and/or zinc-oxide-based II-VI Group compound semiconductor crystal layer is grown on the heated substrate, while introducing a pressing gas substantially in a vertical direction toward the substrate to press the reaction gas against the entire surface of the substrate.

Abstract: A method of depositing a p-type magnesium-, cadmium- and/or zinc-oxide-based II-VI Group compound semiconductor crystal layer over a substrate by a metalorganic chemical vapor deposition technique. A reaction gas is supplied to a surface of a heated substrate in a direction parallel or oblique to the substrate. The p-type magnesium-, cadmium- and/or zinc-oxide-based II-VI Group compound semiconductor crystal layer is grown on the heated substrate, while introducing a pressing gas substantially in a vertical direction toward the substrate to press the reaction gas against the entire surface of the substrate.

Abstract: A method of depositing a p-type magnesium-, cadmium- and/or zinc-oxide-based II-VI Group compound semiconductor crystal layer over a substrate by a metalorganic chemical vapor deposition technique. A reaction gas is supplied to a surface of a heated substrate in a direction parallel or oblique to the substrate. The p-type magnesium-, cadmium- and/or zinc-oxide-based II-VI Group compound semiconductor crystal layer is grown on the heated substrate, while introducing a pressing gas substantially in a vertical direction toward the substrate to press the reaction gas against the entire surface of the substrate.

Abstract: A zinc oxide (ZnO) field effect transistor exhibits large input amplitude by using a gate insulating film. A channel layer and a gate insulating film are sequentially n laminated on a substrate. A gate electrode is formed on the gate insulating film. A source electrode and a drain electrode are disposed at the both sides of the gate electrode and are electrically connected to the channel layer via openings. The channel layer is formed from n-type ZnO. The gate insulating film is made from aluminum nitride/aluminum gallium nitride (AlN/AlGaN) or magnesium zinc oxide (MgZnO), which exhibits excellent insulation characteristics, thus increasing the Schottky barrier and achieving large input amplitude. If the FET is operated in the enhancement mode, it is operable in a manner similar to a silicon metal oxide semiconductor field effect transistor (Si-MOS-type FET), resulting in the formation of an inversion layer.