Abstract: A storage system includes: a control processor, configured to: read user data with a read threshold, determine which threshold adjustment range has been activated by reading a 1 and 0 counter, select an adjusted read threshold, based on the threshold adjustment range, to reread the user data in a physical block using the adjusted read threshold to correct the user data; and reading the user data in the physical block using the adjusted read threshold selected from the threshold adjustment range.

Abstract: A storage system includes: a control processor, configured to: read user data with a read threshold, determine which threshold adjustment range has been activated by reading a 1 and 0 counter, select an adjusted read threshold, based on the threshold adjustment range, to reread the user data in a physical block using the adjusted read threshold to correct the user data; and reading the user data in the physical block using the adjusted read threshold selected from the threshold adjustment range.

Abstract: A storage system includes: a control processor, configured to: read user data with a read threshold, detect an uncorrectable error in the user data, detect a sector balanced when the number of 1's and 0's in the user data is within the difference stored in a range register, apply an XOR RAID recovery to correct the uncorrectable error in the user data; and a non-volatile memory array, coupled to the control processor, configured to store the user data; and wherein the control processor is further configured to forego an additional read of a sector N with a different value of the read threshold when the sector balanced initiates the XOR RAID recovery.

Abstract: A storage system includes: a control processor, configured to: read user data with a read threshold, detect a correctable data error in the user data, adjust the read threshold to correct the correctable data error, read a 1 and 0 counter to determine which threshold adjustment range has been activated, generate an adjusted read threshold, based on the threshold adjustment range, to update an optimal read threshold set; and read the user data in a physical block using the adjusted read threshold.

Abstract: A storage system includes: a control processor, configured to: read user data with a read threshold, detect an uncorrectable error in the user data, detect a sector balanced when the number of 1's and 0's in the user data is within the difference stored in a range register, apply an XOR RAID recovery to correct the uncorrectable error in the user data; and a non-volatile memory array, coupled to the control processor, configured to store the user data; and wherein the control processor is further configured to forego an additional read of a sector N with a different value of the read threshold when the sector balanced initiates the XOR RAID recovery.

Abstract: A computer system includes: a storage controller configured to: read a device temperature from a storage device, and calculate a normalized temperature from the device temperature; a processing device, coupled to the storage controller, configured to: access application data, read a composite temperature from the storage controller, and wherein the composite temperature includes the normalized temperature that is higher than the device temperature when a frequency of the processing device is less than FMAX; and an air flow generator, coupled to the processing device, configured to direct a flow of cooling air based on the composite temperature.

Abstract: A solid-state drive (“SSD”) containing a non-volatile memory (“NVM”), flash translation layer (“FTL”) table, cache node index table, and random access memory (“RAM”) configured to cache at least a portion of the FTL table is disclosed. The NVM is organized its memory space into memory blocks for data storage wherein each of the memory blocks is further divided into a set of physical pages addressable by corresponding physical page addresses (“PPAs”). The FTL table, also known as address mapping table, includes multiple entries used for NVM memory accessing. Each entry of the FTL table stores a PPA addressing a physical page in the NVM. The RAM caches or stores a portion of the FTL table based on a table caching mechanism. The cache node index table resided in the RAM or RAM cache contains indexing information associated with the FTL table.