Patents by Inventor Shao-Chun CHIU

Shao-Chun CHIU has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11994534
    Abstract: A testing device for testing an integrated circuit package is provided, including a printed circuit board, a testing socket, a conductive fastener, a cover, and a conductive element assembly. The printed circuit board includes a first metal layer formed on the bottom surface thereof. The testing socket is disposed above the printed circuit board. The conductive fastener is configured to secure the testing socket to the printed circuit board, wherein the conductive fastener is electrically connected to the first metal layer and the testing socket. The cover is disposed above the testing socket to form a space for accommodating the integrated circuit package between the cover and the testing socket, wherein the cover makes electrical contact with the integrated circuit package. The conductive element assembly is disposed between and electrically connected to the cover and the testing socket.
    Type: Grant
    Filed: March 13, 2023
    Date of Patent: May 28, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shao-Chun Chiu, Wen-Feng Liao, Hao Chen, Chun-Hsing Chen
  • Publication number: 20230228793
    Abstract: A testing device for testing an integrated circuit package is provided, including a printed circuit board, a testing socket, a conductive fastener, a cover, and a conductive element assembly. The printed circuit board includes a first metal layer formed on the bottom surface thereof. The testing socket is disposed above the printed circuit board. The conductive fastener is configured to secure the testing socket to the printed circuit board, wherein the conductive fastener is electrically connected to the first metal layer and the testing socket. The cover is disposed above the testing socket to form a space for accommodating the integrated circuit package between the cover and the testing socket, wherein the cover makes electrical contact with the integrated circuit package. The conductive element assembly is disposed between and electrically connected to the cover and the testing socket.
    Type: Application
    Filed: March 13, 2023
    Publication date: July 20, 2023
    Inventors: Shao-Chun CHIU, Wen-Feng LIAO, Hao CHEN, Chun-Hsing CHEN
  • Patent number: 11604211
    Abstract: A testing device for testing an integrated circuit package is provided, including a printed circuit board having a first surface, a second surface, and multiple conductive layers between the first and second surfaces. A metal layer is formed on the second surface and is electrically connected to one of the conductive layers that is grounded. A testing socket is disposed over the first surface. A conductive fastener secures the testing socket to the printed circuit board and is electrically connected to the metal layer. A cover is disposed over the testing socket to form a space for accommodating the integrated circuit package between the cover and the testing socket. The cover has a conductive surface in contact with the integrated circuit package. A conductive element assembly is disposed between the cover and the testing socket and is electrically connected to the conductive surface and the conductive fastener.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 14, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Shao-Chun Chiu, Wen-Feng Liao, Hao Chen, Chun-Hsing Chen
  • Publication number: 20230063518
    Abstract: A testing device for testing an integrated circuit package is provided, including a printed circuit board having a first surface, a second surface, and multiple conductive layers between the first and second surfaces. A metal layer is formed on the second surface and is electrically connected to one of the conductive layers that is grounded. A testing socket is disposed over the first surface. A conductive fastener secures the testing socket to the printed circuit board and is electrically connected to the metal layer. A cover is disposed over the testing socket to form a space for accommodating the integrated circuit package between the cover and the testing socket. The cover has a conductive surface in contact with the integrated circuit package. A conductive element assembly is disposed between the cover and the testing socket and is electrically connected to the conductive surface and the conductive fastener.
    Type: Application
    Filed: August 30, 2021
    Publication date: March 2, 2023
    Inventors: Shao-Chun CHIU, Wen-Feng LIAO, Hao CHEN, Chun-Hsing CHEN