Patents by Inventor SHAO-HUA JIN

SHAO-HUA JIN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11640658
    Abstract: The present disclosure discloses a multi-path image processing apparatus. An image merging circuit is configured to receive image frames that at least one of the image frames has a largest row number, generate redundant pixel row for each of the image frames that has a row number smaller than the largest row number such that the row number of each of the image frames equals to the largest row number, generate redundant pixel columns for each of the image frames having the number thereof determined by a size of a largest operation window, and merge each two of the image frames through the redundant columns thereof to generate a merged image frame. An image processing circuit performs image processing procedure on the merged image frame to generate a processed merged image frame, wherein at least a part of the image processing procedure is operated according to the largest operation window. An image segmentation circuit segments the processed merged image frame to generate processed image frames.
    Type: Grant
    Filed: December 23, 2020
    Date of Patent: May 2, 2023
    Assignee: REALTEK SEMICONDUCTOR CORPORATION
    Inventors: Qing-Zhe Qiu, Dong-Yu He, Shao-Hua Jin, Hong-Hai Dai
  • Publication number: 20220005167
    Abstract: The present disclosure discloses a multi-path image processing apparatus. An image merging circuit is configured to receive image frames that at least one of the image frames has a largest row number, generate redundant pixel row for each of the image frames that has a row number smaller than the largest row number such that the row number of each of the image frames equals to the largest row number, generate redundant pixel columns for each of the image frames having the number thereof determined by a size of a largest operation window, and merge each two of the image frames through the redundant columns thereof to generate a merged image frame. An image processing circuit performs image processing procedure on the merged image frame to generate a processed merged image frame, wherein at least a part of the image processing procedure is operated according to the largest operation window. An image segmentation circuit segments the processed merged image frame to generate processed image frames.
    Type: Application
    Filed: December 23, 2020
    Publication date: January 6, 2022
    Inventors: QING-ZHE QIU, DONG-YU HE, SHAO-HUA JIN, HONG-HAI DAI