Abstract: A method for forming a semiconductor device structure is provided. The semiconductor device structure includes a first fin structure formed over a substrate, and the first fin structure includes a plurality of first nanostructures stacked in a vertical direction. The semiconductor device structure further includes a second fin structure formed over the substrate, and the second fin structure includes a plurality of second nanostructures stacked in a vertical direction. The semiconductor device structure further includes a dummy fin structure between the first fin structure and the second fin structure. The dummy fin structure includes a first etching stop layer between a bottom portion and a top portion.

Abstract: A semiconductor device and a method of forming the same are provided. In an embodiment, an exemplary semiconductor device includes a vertical stack of channel members disposed over a substrate, a gate structure wrapping around each channel member of the vertical stack of channel members, and a source/drain feature disposed over the substrate and coupled to the vertical stack of channel members. The source/drain feature is spaced apart from a sidewall of the gate structure by an air gap and a dielectric layer, and the air gap extends into the source/drain feature.

Abstract: A method for generating syngas comprising heating cellulosic material in a vessel comprising a pathway and a heat generator in thermal communication with the pathway to thermally degenerate the cellulosic material by pyrolysis, the cellulosic material forming biochar and releasing syngas when undergoing pyrolysis, displacing the generated syngas along the pathway to thereby filter the syngas through at least one of the cellulosic material and the biochar undergoing pyrolysis, reacting at least a portion of the generated syngas with catalytic material presented along the pathway for reforming the at least a portion of the generated syngas being displaced along the pathway, and discharging the filtered syngas from the vessel. The cellulosic material comprising at least one of woodchips, wood pellets, biomass and biowaste.

Abstract: Semiconductor devices and methods of fabrication are described herein. The method includes steps for patterning fins in a multilayer stack and forming an opening in a fin and into a substrate as an initial step in forming a source/drain region. A first semiconductor material is epitaxially grown from channels exposed along sidewalls of the opening to form first source/drain structures. A second semiconductor material is epitaxially grown from the first semiconductor material to form a second source/drain structure over and to fill a space between the first source/drain structures. A bottom of the second source/drain structure is located below a bottommost surface of the first source/drain structures. The second semiconductor material has a greater concentration percentage by volume of germanium than the first semiconductor material. A stack of nanostructures is formed by removing sacrificial layers of the multilayer stack, the second semiconductor material being electrically coupled to the nanostructures.

Abstract: Provided are a hydrated salt composite for thermochemical heat storage, and a preparation method and use thereof. A hydrated salt is compounded with a high-thermal-conductivity material and a reinforcing material to obtain the hydrated salt composite for thermochemical heat storage.

Abstract: A non-coherent noise reduction method, comprising: (a) receiving a plurality of input audio sensing signals by a processor, wherein the input audio sensing signals correspond to a plurality of channels responsive to sensing by a plurality of audio sensors; (b) detecting whether non-coherent noise exists in at least one of the channels by a non-coherent noise detector; (c) estimating at least one noise power of the non-coherent noise by a noise power estimator, if the non-coherent noise exists in at least one of the channels; (d) deriving at least one noise contour of the non-coherent noise by a noise contour estimator, if the non-coherent noise exists in at least one of the channels; and (e) enhancing the input audio sensing signals according to the noise power and the noise contour if the non-coherent noise exists in at least one of the channels.

Abstract: A semiconductor device includes a plurality of nanostructures extending in a first direction above a semiconductor substrate and arranged in a second direction substantially perpendicular to the first direction and a gate structure extending in a third direction perpendicular to both the first and second directions, the gate structure surrounding each of the plurality of nanostructures. Each of the plurality of nanostructures has an outer region having a composition different from a composition of an inner region of each of the plurality of the nanostructures. The gate structure includes a plurality of high-k gate dielectric layers respectively surrounding the plurality of nanostructures, a work function layer surrounding each of the plurality of high-k gate dielectric layers and a fill metal layer surrounding the work function layer.

Abstract: Described herein are multi-layered windows for use in chemical-mechanical planarization (CMP) systems and CMP processes. The multi-layered windows of the present disclosure include a transparent structural layer and a hydrophilic surfactant applied to at least a portion of at least one surface of the transparent structural layer. Such multi-layered windows may be in the polishing pad, the platen, or both.

Abstract: Described herein are multi-layered windows for use in chemical-mechanical planarization (CMP) systems and CMP processes. The multi-layered windows of the present disclosure include a transparent structural layer and a hydrophilic surfactant applied to at least a portion of at least one surface of the transparent structural layer. Such multi-layered windows may be in the polishing pad, the platen, or both.

Abstract: A method for generating syngas comprising heating woodchips in a vessel comprising a circulatory pathway and a heat generator in thermal communication with the circulator pathway to thermally degenerate the woodchips by pyrolysis with the woodchips forming biochar and releasing syngas when undergoing pyrolysis. The method further comprises circulating the generated syngas along the circulatory pathway to thereby filter the syngas through at least one of the woodchips and the biochar undergoing pyrolysis, and discharging the filtered syngas from the vessel.

Abstract: A semiconductor device includes a plurality of nanostructures extending in a first direction above a semiconductor substrate and arranged in a second direction substantially perpendicular to the first direction and a gate structure extending in a third direction perpendicular to both the first and second directions, the gate structure surrounding each of the plurality of nano structures. Each of the plurality of nanostructures has an outer region having a composition different from a composition of an inner region of each of the plurality of the nanostructures. The gate structure includes a plurality of high-k gate dielectric layers respectively surrounding the plurality of nanostructures, a work function layer surrounding each of the plurality of high-k gate dielectric layers and a fill metal layer surrounding the work function layer.

Abstract: Semiconductor devices and methods of fabrication are described herein. The method includes steps for patterning fins in a multilayer stack and forming an opening in a fin and into a substrate as an initial step in forming a source/drain region. A first semiconductor material is epitaxially grown from channels exposed along sidewalls of the opening to form first source/drain structures. A second semiconductor material is epitaxially grown from the first semiconductor material to form a second source/drain structure over and to fill a space between the first source/drain structures. A bottom of the second source/drain structure is located below a bottommost surface of the first source/drain structures. The second semiconductor material has a greater concentration percentage by volume of germanium than the first semiconductor material. A stack of nanostructures is formed by removing sacrificial layers of the multilayer stack, the second semiconductor material being electrically coupled to the nanostructures.

Abstract: Semiconductor structures and methods are provided. A semiconductor structure according to the present disclosure includes a first active region extending lengthwise along a first direction and having a first width along a second direction perpendicular to the first direction, a second active region extending lengthwise along the first direction and having a second width along the second direction, and an epitaxial feature sandwiched between the first active region and the second active region along the first direction. The first width is greater than the second width.

Abstract: Semiconductor devices and methods of fabrication are described herein. The method includes steps for patterning fins in a multilayer stack and forming an opening in a fin and into a substrate as an initial step in forming a source/drain region. A first semiconductor material is epitaxially grown from channels exposed along sidewalls of the opening to form first source/drain structures. A second semiconductor material is epitaxially grown from the first semiconductor material to form a second source/drain structure over and to fill a space between the first source/drain structures. A bottom of the second source/drain structure is located below a bottommost surface of the first source/drain structures. The second semiconductor material has a greater concentration percentage by volume of germanium than the first semiconductor material. A stack of nanostructures is formed by removing sacrificial layers of the multilayer stack, the second semiconductor material being electrically coupled to the nanostructures.

Abstract: A level shifter circuit of a driving device includes first and second pulse generators, first and second level shifters, and a determination circuit. The first pulse generator provides a first input signal according to a high-voltage signal. The first input signal includes a pulse signal having a first current level and a sustain signal having a second current level following the pulse signal. The first level shifter receives the first input signal to generate a first indication signal. The second pulse generator provides a second input signal according to the high-voltage signal. The second input signal includes the pulse signal and the sustain signal following the pulse signal. The second level shifter receives the second input signal to generate a second indication signal. The determination circuit generates a low-voltage signal according to the first indication signal and the second indication signal.

Abstract: A method for forming a semiconductor device structure is provided. The semiconductor device structure includes a first fin structure formed over a substrate, and the first fin structure includes a plurality of first nanostructures stacked in a vertical direction. The semiconductor device structure further includes a second fin structure formed over the substrate, and the second fin structure includes a plurality of second nanostructures stacked in a vertical direction. The semiconductor device structure further includes a dummy fin structure between the first fin structure and the second fin structure. The dummy fin structure includes a first etching stop layer between a bottom portion and a top portion.

Abstract: A level shifter circuit of a driving device includes first and second pulse generators, first and second level shifters, and a determination circuit. The first pulse generator provides a first input signal according to a high-voltage signal. The first input signal includes a pulse signal having a first current level and a sustain signal having a second current level following the pulse signal. The first level shifter receives the first input signal to generate a first indication signal. The second pulse generator provides a second input signal according to the high-voltage signal. The second input signal includes the pulse signal and the sustain signal following the pulse signal. The second level shifter receives the second input signal to generate a second indication signal. The determination circuit generates a low-voltage signal according to the first indication signal and the second indication signal.

Abstract: A power switch circuit with current sensing is disclosed. The power switch circuit is coupled between an input voltage and an output terminal. The power switch circuit includes a power switch, a first sensing switch, an adjusting circuit and a second sensing switch. The power switch is coupled to the input voltage. The first sensing switch is coupled in series between the power switch and the output terminal. There is a first node between the first sensing switch and the power switch. The adjusting circuit is coupled to the first node. The second sensing switch is coupled between the adjusting circuit and the output terminal. A control terminal of the power switch is coupled to a first control voltage. Control terminals of the first sensing switch and the second sensing switch are coupled to a second control voltage. The second control voltage is different from the first control voltage.

Abstract: The application relates to a capacitance sensing circuit, which samples and holds a reference signal to generate an input reference signal, hereby, an input signal is generated to a sensing circuit. Thereby, the sensing circuit generates an output signal according to the input signal and a sensing signal, for the capacitance sensing.

Abstract: Semiconductor devices and methods of fabrication are described herein. The method includes steps for patterning fins in a multilayer stack and forming an opening in a fin and into a substrate as an initial step in forming a source/drain region. A first semiconductor material is epitaxially grown from channels exposed along sidewalls of the opening to form first source/drain structures. A second semiconductor material is epitaxially grown from the first semiconductor material to form a second source/drain structure over and to fill a space between the first source/drain structures. A bottom of the second source/drain structure is located below a bottommost surface of the first source/drain structures. The second semiconductor material has a greater concentration percentage by volume of germanium than the first semiconductor material. A stack of nanostructures is formed by removing sacrificial layers of the multilayer stack, the second semiconductor material being electrically coupled to the nanostructures.