Abstract: Methods for managing digital television (TV) signals are disclosed. An embodiment of a method for managing digital TV signals, performed by an electronic device, comprises the following steps. Multiple first digital TV signals and multiple second digital TV signals are selectively received, thereby enabling a display device thereof or an external display to present a series of frames corresponding to the selected digital TV signals.

Abstract: An embodiment of a method for decoding large images performed by a processing unit, comprises the following steps. A compressed bit stream of a minimum code unit (MCU) of an image is acquired. The acquired bit stream is decoded by performing a first stage of a image decoding procedure to generate a temporary decoding result of the acquired bit stream. It is determined whether the MCU requires display. If so, the generated temporary decoding result is decoded by performing a second stage of the image decoding procedure to generate display data of the acquired bit stream. The temporary decoding result of the acquired bit stream is utilized to decode another MCU of the bit stream.

Abstract: Methods for managing digital television (TV) signals are disclosed. An embodiment of a method for managing digital TV signals, performed by an electronic device, comprises the following steps. Multiple first digital TV signals and multiple second digital TV signals are selectively received, thereby enabling a display device thereof or an external display to present a series of frames corresponding to the selected digital TV signals.

Abstract: An image-decoding system with multi-run mechanism and method thereof are described. The image-decoding system with multi-run mechanism comprises IDLE, COEFF_READ, HUFF_ADDR_LOG, HUFF_ADDR_PHY, EOB_RUN_GEN, AMP_CAL, COEFF_WRITE state units. The IDLE state unit is used to reset a plurality of indicating signals to initial statuses, respectively. The COEFF_READ state unit coupled to the IDLE state unit can reads the data coefficients stored in a memory unit according to the indicating signals. The HUFF_ADDR_LOG state unit coupled to the COEFF_READ state unit locates a logical address of the data coefficients which is referred to the Huffman code to read the content of the data coefficients. The HUFF_ADDR_PHY state unit coupled to the HUFF_ADDR_LOG state unit can reads the data coefficients which are referred to the Huffman code stored in the memory unit to indicate a physical address of the data coefficients.

Abstract: A hardware-implemented Huffman decoder converting Huffman-encoded data to raw data using logic gates to implement logic states. The logic states include IDLE, COEFF_READ, COEFF_WRITE, HUFF_ADDR_LOG, HUFF_ADDR_PHY, AMP_CAL, and EOB_RUN13 GEN. IDLE state transfers to COEFF_READ or AMP_CAL states according to eob_run, ac_first_scan, and ss signals, COEFF_READ state transfers to HUFF_ADDR_LOG or AMP_CAL states according to ac_first_scan, ac_refine_scan, eob_run, new_ac_nonzero_coeff, and dc_refine_scan signals. COEFF_WRITE state transfers to AMP_CAL or COEFF_READ states according to ac_first_scan, coeff_index, zero_run, and eob_run signals. HUFF_ADDR_LOG state transfers to HUFF_ADDR_PHY state and HUFF_ADDR_PHY state transfers to AMP_CAL or EOB_RUN_GEN states according to ac_first_scan and ac_refine_scan signals.

Abstract: An embodiment of a method for decoding large images performed by a processing unit, comprises the following steps. A compressed bit stream of a minimum code unit (MCU) of an image is acquired. The acquired bit stream is decoded by performing a first stage of a image decoding procedure to generate a temporary decoding result of the acquired bit stream. It is determined whether the MCU requires display. If so, the generated temporary decoding result is decoded by performing a second stage of the image decoding procedure to generate display data of the acquired bit stream. The temporary decoding result of the acquired bit stream is utilized to decode another MCU of the bit stream.