Patents by Inventor Shao-Ming Chang

Shao-Ming Chang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240171074
    Abstract: A switching regulator includes: a power stage circuit, a control circuit and an operation clock signal generator circuit. The operation clock signal generator circuit includes: a time point option unit generating a time point option signal according to a phase node voltage during a ringing period subsequent to a blanking period, to indicate at least one available turn-on time point, or generating a lowest voltage time point signal according to the phase node voltage during a tolerance period, to indicate a lowest voltage time point; and a time point deciding unit deciding the tolerance period according to a base clock signal and a tolerable frequency range and select the available turn-on time point or the lowest voltage time point within the tolerance period as a decided time point, to generate the operation clock signal.
    Type: Application
    Filed: October 25, 2023
    Publication date: May 23, 2024
    Inventors: Jiing-Horng Wang, Yu-Pin Tseng, Chia-Jung Chang, Tsan-He Wang, Shao-Ming Chang
  • Publication number: 20240128868
    Abstract: A switching regulator includes: a power stage circuit; a control circuit; and an operation clock signal generator circuit configured to generate plural test clock signals during a clock determination period and generate an operation clock signal during a normal operation period. When the switching regulator operates during the clock determination period in a discontinuous conduction mode, the control circuit alternatingly generates plural PWM signals corresponding to the test clock signals generated by the operation clock signal generator circuit and an output voltage, wherein each PWM signal corresponds to one test clock signal, so that the power stage circuit generates corresponding phase node voltages at a phase node, wherein among the plural test clock signals, the operation clock signal generator circuit selects one test clock signal corresponding to a minimum phase node voltage as the operation clock signal during the normal operation period.
    Type: Application
    Filed: September 21, 2023
    Publication date: April 18, 2024
    Inventors: Chia-Jung Chang, Shao-Ming Chang, Tsan-He Wang, Jiing-Horng Wang, Yu-Pin Tseng
  • Patent number: 11783765
    Abstract: A light emitting diode (LED) driver circuit is configured to drive plural LEDs which are respectively coupled to m scan-lines and n data-lines, wherein m and n are both integers greater than or equal to one. During a driving stage, each of the LEDs is controlled to emit light according to the electrical characteristics on the corresponding scan-line and on the corresponding data-line where the LED is coupled to. The LED driver circuit includes: a power saving control circuit which includes a storage capacitor; a pre-discharging circuit configured to pre-discharge the charges on the m scan-lines to the storage capacitor during a pre-discharging stage; and a pre-charging circuit configured to pre-charge the n data-lines by the charges stored in the storage capacitor during a pre-charging stage.
    Type: Grant
    Filed: March 2, 2023
    Date of Patent: October 10, 2023
    Inventors: Chia-Jung Chang, Shao-Ming Chang, Hsiang-Feng Yu, Tso-Yu Wu, Yu-Pin Tseng
  • Publication number: 20090041266
    Abstract: An electrostatic loudspeaker driver includes a class-D amplifier and a demodulator circuit. The class-D amplifier is operated with a PWM signal, creating an amplified digital signal according to an input signal. A low-pass filter in the demodulator circuit filters out the PWM carrier frequency in the digital signal and retrieves an audio signal therefrom. The efficiency is improved significantly and heat sink is no longer needed.
    Type: Application
    Filed: August 8, 2008
    Publication date: February 12, 2009
    Inventors: Jwin-Yen Guo, Liang-Pin Tai, Shao-Ming Chang