Abstract: The present disclosure provides a memory device, a semiconductor device, and a method of operating a memory device. A memory device includes a memory cell, a bit line, a word line, a select transistor, a fuse element, and a heater. The bit line is connected to the memory cell. The word line is connected to the memory cell. The select transistor is disposed in the memory cell. A gate of the select transistor is connected to the word line. The fuse element is disposed in the memory cell. The fuse element is connected to the bit line and the select transistor. The heater is configured to heat the fuse element.

Abstract: Disclosed are a computer-implemented method, a system and a computer program product for feature processing. In the computer-implemented method for feature processing, two input features selected from multiple features of each sample in a sample set are projected to one resulting feature by one or more processing units based on a specified curve. The sample set is updated by replacing the two input features with the one resulting feature for each sample in the sample set by one or more processing units. The projecting and the updating for the sample set are repeated by one or more processing units until the number of features of each sample in the sample set reaches a predetermined criterion.

Abstract: Various embodiments are disclosed for providing machine learning routines with peripheral device data to infer driver activity and location. Peripheral device data may be collected on a peripheral device having a machine learning routine executing thereon to infer driver activity and perform improved estimation of driver location. Using driver activity and location estimation, contextually relevant delivery workflow assistance may be automatically provided to a delivery driver or other individual without requiring manual input, thereby improving driver safety and operational efficiency.

Abstract: A multi-fuse memory cell is disclosed. The circuit includes: a first fuse element electrically coupled to a first transistor, a gate of the first transistor is electrically coupled to a first selection signal; a second fuse element electrically coupled to a second transistor, a gate of the second transistor is electrically coupled to a second selection signal, both the first transistor and the second transistor are grounded; and a programming transistor electrically coupled to the first fuse element and the second fuse element, wherein a gate of the programming transistor is electrically coupled to a programming signal.

Abstract: A method for filling a gap in a semiconductor structure includes: forming the gap between two raised portions of the semiconductor structure, the gap having a bottom surface and two lateral surfaces each extending upwardly from the bottom surface along one of the raised portions to terminate at an upper surface of a corresponding one of the raised portions; and forming a filler element in the gap in a bottom-up manner that avoids the filler element being formed laterally.

Abstract: A method for manufacturing a semiconductor device includes forming a conductive feature in a first dielectric layer; forming a second dielectric layer on the first dielectric layer; forming a trench that penetrates through the second dielectric layer, and terminates at the conductive feature; forming a contact layer in the trench and on the conductive feature; etching back the contact layer to form a first via contact feature in the trench, the first via contact feature being electrically connected to the conductive feature; and forming a second via contact feature on the first via contact feature in the trench.