Abstract: The present invention discloses a three-dimensional package structure which can achieve a relatively high utilization of an internal space thereof, so that a size of electronic package structure can be reduced. The three-dimensional package structure comprises a first electronic component, a plurality of second electronic components and a plurality of conductive patterns. The first electronic component has a top surface and a bottom surface. The plurality of second electronic components are disposed over the top surface of the first electronic component. The plurality of conductive patterns are disposed over the plurality of second electronic components to electrically connect the plurality of second electronic components and the first electronic component.

Abstract: The problem of poor signal quality of biometric measurement is improved with a new headset construction. The new headset includes a sensor assembly that provides more stable and secure contact between the sensor electrodes and the scalp of the wearer of the headset. The sensor assembly includes a housing unit for the electrodes and has a flexible and collapsible wall portion, which flexes and deforms according to the strength and the location of the pressure applied to the electrodes to maximize the contact area between the scalp and the sensors.

Abstract: A three-dimensional package structure, comprising: a substrate; a first plurality of discrete electronic components disposed over the bottom surface of the substrate, wherein a first insulating layer is disposed over the bottom surface of the substrate to encapsulate the first plurality of discrete electronic components, wherein at least one second insulating layer is disposed over the first insulating layer, wherein a plurality of surface-mount pads are disposed on the bottom surface of the at least one second insulating layer and electrically connected to at least one via disposed in the at least one second insulating layer.

Abstract: The present invention discloses a substrate where the lateral surface of the substrate is formed to expose at least one portion of a via(s) for circuit connection. The substrate comprises a plurality of insulating layers; and a plurality of conductive layers separated by the plurality of insulating layers. A first lateral surface of the substrate is formed by the plurality of conductive layers and the plurality of insulating layers. The first lateral surface of the substrate comprises at least one first portion of a first via filled with a first conductive material.

Abstract: The present invention discloses a three-dimensional package structure which can achieve a relatively high utilization of an internal space thereof, so that a size of electronic package structure can be reduced. The three-dimensional package structure comprises a first electronic component, a plurality of second electronic components and a plurality of conductive patterns. The first electronic component has a top surface and a bottom surface. The plurality of second electronic components are disposed over the top surface of the first electronic component. The plurality of conductive patterns are disposed over the plurality of second electronic components to electrically connect the plurality of second electronic components and the first electronic component.

Abstract: The present invention discloses a three-dimensional package structure which can achieve a relatively high utilization of an internal space thereof, so that a size of electronic package structure can be reduced. The three-dimensional package structure comprises a first electronic component, a plurality of second electronic components and a plurality of conductive patterns. The first electronic component has a top surface and a bottom surface. The plurality of second electronic components are disposed over the top surface of the first electronic component. The plurality of conductive patterns are disposed over the plurality of second electronic components to electrically connect the plurality of second electronic components and the first electronic component.

Abstract: A three-dimensional package structure, comprising: a substrate; a first plurality of discrete electronic components disposed over the bottom surface of the substrate, wherein a first insulating layer is disposed over the bottom surface of the substrate to encapsulate the first plurality of discrete electronic components, wherein at least one second insulating layer is disposed over the first insulating layer, wherein a plurality of surface-mount pads are disposed on the bottom surface of the at least one second insulating layer and electrically connected to at least one via disposed in the at least one second insulating layer.

Abstract: The present invention discloses a substrate where the lateral surface of the substrate is formed to expose at least one portion of a via(s) for circuit connection. The substrate comprises a plurality of insulating layers; and a plurality of conductive layers separated by the plurality of insulating layers. A first lateral surface of the substrate is formed by the plurality of conductive layers and the plurality of insulating layers. The first lateral surface of the substrate comprises at least one first portion of a first via filled with a first conductive material.

Abstract: The present invention discloses a three-dimensional package structure which can achieve a relatively high utilization of an internal space thereof, so that the size of electronic package structure can be reduced. The three-dimensional package structure comprises a substrate, a first plurality of discrete conductive components and a connecting structure. The substrate has a top surface and a bottom surface. The first plurality of discrete conductive components are disposed over the bottom surface of the substrate. The connecting structure is disposed over the bottom surface of the substrate for encapsulating the first plurality of discrete electronic components. The connecting structure comprises at least one insulating layer and a plurality of conductive patterns separated by the at least one insulating layer. The plurality of conductive patterns are disposed over the first plurality of discrete electronic components for electrically connecting the first plurality of discrete electronic components.

Abstract: A method of calibrating and debugging a testing system is provided. First, values of different electrical path segments are calibrated, and parameters of the electrical path segments while being calibrated are saved. After calibration, electrical tests can be processed on a DUT. If the testing system malfunctions, the values of the electrical path segments are calibrated again to compare the current parameters to the previously saved parameters. The component which goes wrong can be found out quickly in this way.

Abstract: The present invention discloses a substrate where the lateral surface of the substrate is formed to expose at least one portion of a via(s) for circuit connection. The substrate comprises a plurality of insulating layers; and a plurality of conductive layers separated by the plurality of insulating layers. A first lateral surface of the substrate is formed by the plurality of conductive layers and the plurality of insulating layers. The first lateral surface of the substrate comprises at least one first portion of a first via filled with a first conductive material.

Abstract: A bio-sensor includes a substrate having a light-sensing region thereon. A first dielectric layer, a diffusion barrier layer, and a second dielectric layer are disposed on the substrate. A trenched recess structure is formed in the second dielectric layer, which is filled with a light filter layer that is capped with a cap layer. A first passivation layer and a nanocavity construction layer are disposed on the cap layer. A nanocavity is formed in the nanocavity construction layer. The sidewall and bottom surface of the nanocavity is lined with a second passivation layer.

Abstract: A bio-sensor includes a substrate having a light-sensing region thereon. A first dielectric layer, a diffusion barrier layer, and a second dielectric layer are disposed on the substrate. A trenched recess structure is formed in the second dielectric layer, which is filled with a light filter layer that is capped with a cap layer. A first passivation layer and a nanocavity construction layer are disposed on the cap layer. A nanocavity is formed in the nanocavity construction layer. The sidewall and bottom surface of the nanocavity is lined with a second passivation layer.

Abstract: A testing system includes a test machine, a plurality of probe sets, a data input device, a controller, a memory, and a data output device. The test machine has a platform for a DUT to be placed thereon, and a test arm which is movable relative to the platform. The probe sets are provided on the test machine with at least one probe set provided on the test arm to contact the DUT. The data input device is used to input information about the DUT. The controller is electrically connected to the test arm, the probe set on the test arm, and the data input device to move the test arm to a predetermined position according to the inputted information, and to make the probe set contact the DUT for electrical test. The memory saves electrical test result, which is outputted by the data output device.

Abstract: A bio-sensor includes a substrate having a light-sensing region thereon. A first dielectric layer, a diffusion barrier layer, and a second dielectric layer are disposed on the substrate. A trenched recess structure is formed in the second dielectric layer, which is filled with a light filter layer that is capped with a cap layer. A first passivation layer and a nanocavity construction layer are disposed on the cap layer. A nanocavity is formed in the nanocavity construction layer. The sidewall and bottom surface of the nanocavity is lined with a second passivation layer.

Abstract: A method of calibrating and debugging a testing system is provided. First, values of different electrical path segments are calibrated, and parameters of the electrical path segments while being calibrated are saved. After calibration, electrical tests can be processed on a DUT. If the testing system malfunctions, the values of the electrical path segments are calibrated again to compare the current parameters to the previously saved parameters. The component which goes wrong can be found out quickly in this way.

Abstract: A method of operating a testing system is provided, wherein the testing system has a test machine and a probe module, which has a first probe set and a second probe set. One of the first probe set and the second probe set can be connected to the test machine. The method includes the following steps: connect the test machine and the first probe set; calibrate the testing system; abut the first probe set against a DUT to do electrical tests; disconnect the first probe set and the DUT; disconnect the test machine and the first probe set; connect the test machine and the second probe set; calibrate the testing system again; abut the second probe set against the DUT to do electrical tests.

Abstract: A bio-signal sensor is provided, including: a dry electrode having a plurality of probes and a plurality of contacts correspondingly and electrically connected to the probes, wherein each of the probes senses and transmits an electrical signal to the corresponding contact; and a kit replaceably disposed between the dry electrode and a bio-signal measurement device and having a functional circuit for capturing the electrical signals from the contacts so as to generate a bio-signal and a signal output terminal electrically connected to the functional circuit for transmitting the bio-signal to the bio-signal measurement device.

Abstract: A method of calibrating and debugging a testing system is provided. First, values of different electrical path segments are calibrated, and parameters of the electrical path segments while being calibrated are saved. After calibration, electrical tests can be processed on a DUT. If the testing system malfunctions, the values of the electrical path segments are calibrated again to compare the current parameters to the previously saved parameters. The component which goes wrong can be found out quickly in this way.

Abstract: A bio-sensor includes a substrate having a light-sensing region thereon. A first dielectric layer, a diffusion barrier layer, and a second dielectric layer are disposed on the substrate. A trenched recess structure is formed in the second dielectric layer, which is filled with a light filter layer that is capped with a cap layer. A first passivation layer and a nanocavity construction layer are disposed on the cap layer. A nanocavity is formed in the nanocavity construction layer. The sidewall and bottom surface of the nanocavity is lined with a second passivation layer.