Abstract: A microelectromechanical system (MEMS) device includes a diaphragm capacitor, connected between a capacitor biasing voltage source and a ground. A source follower circuit is coupled to the diaphragm capacitor. An amplifier is coupled to the source follower circuit to amplify the voltage signal as an output voltage signal. A programmable trimming circuit is implemented with the amplifier to trim a gain or implemented with the capacitor biasing voltage source to trim voltage applied on the diaphragm capacitor. Whereby, the output voltage signal has a target sensitivity.

Abstract: A microelectromechanical system (MEMS) device includes a diaphragm capacitor, connected between a capacitor biasing voltage source and a ground. A source follower circuit is coupled to the diaphragm capacitor. An amplifier is coupled to the source follower circuit to amplify the voltage signal as an output voltage signal. A programmable trimming circuit is implemented with the amplifier to trim a gain or implemented with the capacitor biasing voltage source to trim voltage applied on the diaphragm capacitor. Whereby, the output voltage signal has a target sensitivity.

Abstract: A device for raising voltage comprises a first element for providing a first output pin with a voltage raise in response to a first voltage change at a first input pin, and for providing a second output pin with a voltage raise in response to a second voltage change at a second input pin; and a second element for driving, when the voltage at the first output pin becomes higher than the voltage at the second output pin due to the first voltage change at the first input pin, the second output pin to maintain a voltage keeping pace with the voltage at the first output pin, and for driving, when the voltage at the second output pin becomes higher than the voltage at the first output pin due to the second voltage change at the second input pin, the first output pin to maintain a voltage keeping pace with the voltage at the second output pin.

Abstract: An apparatus for page mode programming of an EEPROM cell array applications is described. The apparatus comprises a control gate potential control means and a bit line potential control means. The control gate potential control means is connected to the control gate of the EEPROM cell to select the potential for the control gate of the EEPROM cell, while the bit line potential control means is connected to the bit line of the EEPROM cell to select the potential for the bit line. A bit line of the EEPROM cell is first selected by a bit line control signal, then a control gate control signal determines whether provides the high voltage to the control gate of the EEPROM cell.