Abstract: A microfluidic system for controlling movement of charged particles, including a microfluidic channel, at least three electrodes, a plurality of conductor leads and at least two drive power supplies. Each electrode is in electrical contact with the electrolyte, and a pseudo-capacitance, a double-layer capacitance or a combination thereof is formed at an electrode-electrolyte interface. Each drive power supply periodically produces a voltage or current excitation, and is connected to one or more electrodes via the conductor leads. Each electrode continuously undergoes charging-discharging alternating cycles to form a traveling-wave electric field in the microfluidic channel. A maximum charge capacity of each electrode is greater than a total amount of charges transferred thereon during a charging or discharging process. A control method based on the microfluidic system is also provided.

Abstract: A device for controlling charged particles in a fluid, including a microfluidic channel, at least three electrodes, a plurality of conductor leads and at least two drive power supplies. The drive power supplies can periodically produce a voltage or current excitation varying within a cycle, and are connected to at least one of the electrodes via the conductor leads. Each electrode is configured to continuously undergo charging-discharging alternating cycles to form a traveling-wave electric field with a periodically-varying amplitude in the microfluidic channel. A maximum charge capacity of the electrode is greater than a total amount of charges transferred thereon during a charging or discharging process. A charged particle control method is also provided.

Abstract: Examples described herein relate to a circuitry to: based on detected health data of a first circuit board of multiple circuit boards to load firmware from an associated first storage, cause the first circuit board to load the firmware from a second storage associated with a second circuit board of the multiple circuit boards and based on authentication of the loaded firmware, cause boot operations of the first circuit board using the loaded firmware. In some examples, the circuitry comprises a management controller. In some examples, the health data is based on malfunction of a storage medium of the first storage or malfunction of an interface to the first storage.

Abstract: A BIOS error locating method and apparatus, a device, and a storage medium are provided. The method includes: acquiring one or more MAP files which are generated during a compilation process of a BIOS and used for recording an entry address offset of each function; recording a base address of each function module after the BIOS is started, so as to obtain a base address log file; in response to occurrence of an EXCEPTION error during an execution process of the BIOS, executing an Exception handling function, so as to determine, according to the base address log file and the one or more MAP files, a target function that results in the EXCEPTION error; and recording a name of the target function in a serial log, and sending the serial log to a BMC.

Abstract: Please amend the abstract of the specification as follows: Disclosed is a method for configuring an MMIOH base address of a server system. The method includes: when the server system is performing a power-on self-test, detecting a total capacity of all memories in the server system, and determining a minimum MMIOH base address of the server system according to an MMIO specification and the total capacity; if a target MMIOH base address range corresponding to a target PCIE device configured in the server system might be calculated according to a whitelist, and the minimum MMIOH base address is within the target MMIOH base address range, determining that the base address is the MMIOH base address of the server system, and storing the base address in a BIOS of the server system.

Abstract: A BIOS error locating method and apparatus, a device, and a storage medium are provided. The method includes: acquiring one or more MAP files which are generated during a compilation process of a BIOS and used for recording an entry address offset of each function; recording a base address of each function module after the BIOS is started, so as to obtain a base address log file; in response to occurrence of an EXCEPTION error during an execution process of the BIOS, executing an Exception handling function, so as to determine, according to the base address log file and the one or more MAP files, a target function that results in the EXCEPTION error; and recording a name of the target function in a serial log, and sending the serial log to a BMC.

Abstract: Disclosed is a method for configuring an MMIOH base address of a server system. The method includes: when the server system is performing a power-on self-test, detecting a total capacity of all memories in the server system, and determining a minimum MMIOH base address of the server system according to an MMIO specification and the total capacity; if a target MMIOH base address range corresponding to a target PCIE device configured in the server system might be calculated according to a whitelist, and the minimum MMIOH base address is within the target MMIOH base address range, determining that the base address is the MMIOH base address of the server system, and storing the base address in a BIOS of the server system.

Abstract: A lossless compression method and system applied to hardware video decoding are provided. The method sequentially includes a video decoding step, a compression step, a storage step and a decompression step, wherein in the compression step, lossless compression is performed by taking a 16×4 Y luma block and a corresponding 8×2 U chroma block and V chroma block as a compression unit; in the storage step, compact compression and storage is performed on a complete frame of image by taking four pixel lines as a unit, and a starting address of every four pixel lines is fixed; and the video decoding step includes a reference frame reading step, and a two-level Cache structure is adopted in the reference frame reading step. The system is a system applying the method.

Abstract: A lossless compression method and system applied to hardware video decoding are provided. The method sequentially includes a video decoding step, a compression step, a storage step and a decompression step, wherein in the compression step, lossless compression is performed by taking a 16×4 Y luma block and a corresponding 8×2 U chroma block and V chroma block as a compression unit; in the storage step, compact compression and storage is performed on a complete frame of image by taking four pixel lines as a unit, and a starting address of every four pixel lines is fixed; and the video decoding step includes a reference frame reading step, and a two-level Cache structure is adopted in the reference frame reading step. The system is a system applying the method.

Abstract: A process for the production of coated textiles comprises the steps of: providing a textile substrate having a first side and a second side opposing the first side; contacting at least a part of the first side of the textile substrate with a spreadable polyurethane mechanical foam; applying a reduced pressure to at least a part of the second side of the textile substrate opposing the first side which has been contacted with the polyurethane mechanical foam; and solidifying the polyurethane mechanical foam with which the textile substrate has been contacted. The invention further relates to a coated textile obtainable by such a process, in particular a synthetic leather.

Abstract: A process for the production of coated textiles comprises the steps of: providing a textile substrate having a first side and a second side opposing the first side; contacting at least a part of the first side of the textile substrate with a spreadable polyurethane mechanical foam; applying a reduced pressure to at least a part of the second side of the textile substrate opposing the first side which has been contacted with the polyurethane mechanical foam; and solidifying the polyurethane mechanical foam with which the textile substrate has been contacted. The invention further relates to a coated textile obtainable by such a process, in particular a synthetic leather.