Patents by Inventor Shao-wei Yang
Shao-wei Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Publication number: 20250149436Abstract: A method for manufacturing an interconnect structure includes: forming sacrificial portions and electrically conductive portions on a base structure such that the sacrificial portions are disposed to alternate with the electrically conductive portions in a first direction, and such that each of the sacrificial portions and the electrically conductive portions is elongated in a second direction transverse to the first direction; forming blocking portions respectively on the sacrificial portions; forming a sacrificial layer to cover the electrically conductive portions and the blocking portions; forming an electrically conductive via which extends through the sacrificial layer so as to permit the electrically conductive via to be electrically connected to one of the electrically conductive portions; after forming the electrically conductive via, performing a removal process to remove the sacrificial layer, the blocking portions and the sacrificial portions so as to form a cavity; and forming a dielectric portioType: ApplicationFiled: November 6, 2023Publication date: May 8, 2025Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Gary LIU, Ting-Ya LO, Shao-Kuan LEE, Zi-Yi YANG, Chi-Lin TENG, Kuang-Wei YANG, Hsin-Yen HUANG, Hsiao-Kang CHANG, Ming-Han LEE, Shau-Lin SHUE
-
Publication number: 20250132247Abstract: An interconnection structure is provided to include a substrate, a first metal trench, a boron nitride dielectric, a second metal trench, and a metal via. The substrate is formed with a first metal trench. The boron nitride dielectric is disposed over the substrate. The second metal trench is formed in the boron nitride dielectric. The metal via is disposed to interconnect the first metal trench and the second metal trench.Type: ApplicationFiled: October 24, 2023Publication date: April 24, 2025Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Chi-Lin TENG, Gary LIU, Ting-Ya LO, Yen-Ju WU, Shao-Kuan LEE, Kuang-Wei YANG, Hsin-Yen HUANG, Hsiao-Kang CHANG
-
Patent number: 12284804Abstract: The present disclosure provides a memory device, a semiconductor device, and a method of operating a memory device. A memory device includes a memory cell, a bit line, a word line, a select transistor, a fuse element, and a heater. The bit line is connected to the memory cell. The word line is connected to the memory cell. The select transistor is disposed in the memory cell. A gate of the select transistor is connected to the word line. The fuse element is disposed in the memory cell. The fuse element is connected to the bit line and the select transistor. The heater is configured to heat the fuse element.Type: GrantFiled: January 4, 2024Date of Patent: April 22, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.Inventors: Perng-Fei Yuh, Yih Wang, Meng-Sheng Chang, Jui-Che Tsai, Ku-Feng Lin, Yu-Wei Lin, Keh-Jeng Chang, Chansyun David Yang, Shao-Ting Wu, Shao-Yu Chou, Philex Ming-Yan Fan, Yoshitaka Yamauchi, Tzu-Hsien Yang
-
Patent number: 12278143Abstract: Integrated circuit devices and methods of forming the same are provided. A method according to the present disclosure includes providing a workpiece including a first metal feature in a dielectric layer and a capping layer over the first metal feature, selectively depositing a blocking layer over the capping layer, depositing an etch stop layer (ESL) over the workpiece, removing the blocking layer, and depositing a second metal feature over the workpiece such that the first metal feature is electrically coupled to the second metal feature. The blocking layer prevents the ESL from being deposited over the capping layer.Type: GrantFiled: July 26, 2023Date of Patent: April 15, 2025Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hsin-Yen Huang, Shao-Kuan Lee, Cheng-Chin Lee, Hsiang-Wei Liu, Tai-I Yang, Chia-Tien Wu, Hai-Ching Chen, Shau-Lin Shue
-
Publication number: 20250118598Abstract: An interconnection structure and a manufacturing method thereof are provided. The interconnection structure includes a first dielectric layer, a first conductive feature, a second dielectric layer, and a barrier layer. The first conductive feature is disposed on the first dielectric layer, the second dielectric layer is disposed on the first dielectric layer and surrounds the sidewalls of the first conductive feature, the barrier layer is disposed between the first dielectric layer and the second dielectric layer and between the sidewalls of the first conductive feature and the second dielectric layer.Type: ApplicationFiled: October 4, 2023Publication date: April 10, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-Chin LEE, Ting-Ya LO, Chi-Lin TENG, Shao-Kuan LEE, Kuang-Wei YANG, Gary HSU WEI LIU, Yen-Ju WU, Jing-Ting SU, Hsin-Yen HUANG, Hsiao-Kang CHANG, Wei-Chen CHU, Shu-Yun KU, Chia-Tien WU, Ming-Han LEE, Hsin-Ping CHEN
-
Publication number: 20250112088Abstract: A semiconductor structure is provided. The semiconductor structure includes a first low dielectric constant (low-k) layer, a first metal layer, a metal cap layer, a dielectric on dielectric (DoD) layer, an etch stop layer (ESL), a second low-k layer, a metal via and a second metal layer. The dielectric constant of the first low-k layer is less than 4. The first metal layer is embodied in the first low-k layer. The first low-k layer exposes the first metal layer. The metal cap layer is disposed on the first metal layer. The DoD layer is disposed on the first low-k layer. The etch stop layer is disposed on the metal cap layer and the DoD layer. The second low-k layer is disposed above the etch stop layer. The metal via is embodied in the second low-k layer and connected to the first metal layer.Type: ApplicationFiled: September 28, 2023Publication date: April 3, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Cheng-Chin LEE, Yen Ju WU, Shao-Kuan LEE, Kuang-Wei YANG, Hsin-Yen HUANG, Jing Ting SU, Kai-Fang CHENG, Hsiao-Kang CHANG, Wei-Chen CHU, Shu-Yun KU, Chia-Tien WU, Ming-Han LEE, Hsin-Ping CHEN
-
Publication number: 20250087532Abstract: A method includes forming a metal layer over a dielectric layer; forming hard masks over the metal layer; etching the metal layer using the hard masks as etch mask to form metal features; selectively forming dielectric liners on opposite sidewalls of each of the metal features, while leaving surfaces of the hard masks and the dielectric layer exposed by the dielectric liners; and forming an inter-metal dielectric layer laterally surrounding the metal features.Type: ApplicationFiled: September 12, 2023Publication date: March 13, 2025Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.Inventors: Kuang-Wei YANG, Cheng-Chin LEE, Shao-Kuan LEE, Jing Ting SU, Hsin-Ning HUNG, Hsin-Yen HUANG, Hsiao-Kang CHANG
-
Publication number: 20250053103Abstract: Some implementations described herein include operating components in a lithography system at variable speeds to reduce, minimize, and/or prevent particle generation due to rubbing of or collision between contact parts of the components. In some implementations, a component in a path of transfer of a semiconductor substrate in the lithography system is operated at a relatively high movement speed through a first portion of an actuation operation, and is operated at a reduced movement speed (e.g., a movement speed that is less than the high movement speed) through a second portion of the actuation operation in which contact parts of the component are to interact. The reduced movement speed reduces the likelihood of particle generation and/or release from the contact parts when the contact parts interact, while the high movement speed provides a high semiconductor substrate throughput in the lithography system.Type: ApplicationFiled: October 30, 2024Publication date: February 13, 2025Inventors: Shao-Hua WANG, Kueilin HO, Cheng Wei SUN, Zong-You YANG, Chih-Chun CHIANG, Yi-Fam SHIU, Chueh-Chi KUO, Heng-Hsin LIU, Li-Jui CHEN
-
Publication number: 20240184341Abstract: A keyboard device for an electronic device includes a keyboard main body and a protection plate member. The protection plate member is pivotally coupled to the keyboard main body. Consequently, the keyboard main body is covered by the protection plate member, or a first angle is formed between the protection plate member and the keyboard main body. The protection plate member includes a first plate and a second plate. The keyboard main body is pivotally coupled to a first end of the first plate. The second plate is pivotally coupled to a second end of the first plate. After the protection plate member is rotated relative to the keyboard main body and the first angle is formed between the protection plate member and the keyboard main body, the protection plate member is further adjusted to a selected usage mode.Type: ApplicationFiled: February 6, 2023Publication date: June 6, 2024Inventors: Shao-Wei Yang, Chin-Lung Chan, Yi-Hsien Lin
-
Publication number: 20240172850Abstract: A protective cover assembly is provided, which includes a bracket and a biaxial structure. The bracket has a first portion and a second portion pivotally connected to each other. The biaxial structure has a first rotating shaft and a second rotating shaft, in which a portion of the first portion of the bracket away from the second portion is configured to be pivotally connected to or separated from the first rotating shaft or magnetically connected to or separated from the first rotating shaft, and the second rotating shaft is configured to be pivotally connected to a component.Type: ApplicationFiled: January 6, 2023Publication date: May 30, 2024Inventors: Shao-Wei Yang, Yi-Hsien Lin
-
Publication number: 20240045072Abstract: A laser detection system includes a light source module, an optical isolator, a scanner, and a detector. The light source module is configured for emitting a first laser having a first polarization direction. The optical isolator is on an optical path of the first laser configured to emit a second laser by transmitting the first laser from the light source module and prevent the second laser from transmitting toward the light source module. The scanner is on an optical path of the second laser and configured for reflecting the second laser to project a reference light to the target to be tested. The detector is configured to receive detection light reflected by the target to be tested and obtain position information of the target to be tested according to the detection light.Type: ApplicationFiled: August 2, 2023Publication date: February 8, 2024Inventors: KUO-FONG TSENG, SHAO-WEI YANG
-
Patent number: 10672570Abstract: A keyswitch structure includes a base plate, a keycap, a first support, and a second support. The keycap is located above the base plate. The first support is connected to and between the keycap and the base plate and has an upper connection portion, a lower connection portion, and a protruding limitation portion. The upper connection portion is located between the lower connection portion and the protruding limitation portion. The first support is rotatably connected to the keycap and the base plate through the upper connection portion and the lower connection portion respectively. The protruding limitation portion is located close to and under the cap body. The second support is connected to and between the keycap and the base plate. The keycap moves up and down relative to the base plate through the first support and the second support.Type: GrantFiled: January 10, 2019Date of Patent: June 2, 2020Assignee: DARFON ELECTRONICS CORP.Inventors: Chih-Hao Chen, Po-Wei Tsai, Chun-Yuan Wang, Kuan-Te Lin, Shao-Wei Yang, Ling-Hsi Chao
-
Publication number: 20190221384Abstract: A keyswitch structure includes a base plate, a keycap, a first support, and a second support. The keycap is located above the base plate. The first support is connected to and between the keycap and the base plate and has an upper connection portion, a lower connection portion, and a protruding limitation portion. The upper connection portion is located between the lower connection portion and the protruding limitation portion. The first support is rotatably connected to the keycap and the base plate through the upper connection portion and the lower connection portion respectively. The protruding limitation portion is located close to and under the cap body. The second support is connected to and between the keycap and the base plate. The keycap moves up and down relative to the base plate through the first support and the second support.Type: ApplicationFiled: January 10, 2019Publication date: July 18, 2019Inventors: Chih-Hao Chen, Po-Wei Tsai, Chun-Yuan Wang, Kuan-Te Lin, Shao-Wei Yang, Ling-Hsi Chao
-
Publication number: 20170049258Abstract: A proportion-integration-derivation (PID) kettle structure includes: a kettle upper cover; a water filling cap, embedded into kettle upper cover; and a PID element, fixed onto inner side of water filling cap, to indicate usage time of a filter core in a kettle. The PID element includes: a guiding axis, disposed at an end inside the water filling cap; a pushing rack, sleeved around the guiding axis; a reset spring, disposed between pushing rack and guiding axis; an arc-shape rack pushing boss, disposed symmetrically on both sides of the pushing rack, used to push the pushing rack to move, when water filling cap is opened or closed; a driving gear, disposed at front end of the pushing rack, to act in cooperation with the pushing rack; and a driven gear, disposed below the driving gear, and connected to rotate along with the driving gear.Type: ApplicationFiled: July 26, 2016Publication date: February 23, 2017Inventors: Shao-wei Yang, Yun-chuan Wang, Tian-ming Xie