Patents by Inventor Sharad Singhal

Sharad Singhal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12603936
    Abstract: A system receives a first request to perform a collective operation. The system stores a mapping of a first virtual address to a descriptor for a physical location of an allocated memory region. The system performs the collective operation, by writing data to a first segment of the memory region and accessing data from other segments of the memory region. The system receives a second request to perform an update operation, the second request indicating the first virtual address, one or more portions of a memory region segment to be updated, and corresponding data units to write to the portions. The system updates, based on the mapping, only the indicated portions by writing the corresponding data units. The system performs a subsequent iteration of the collective operation, based on the mapping, by bypassing writing any data to the memory region and only accessing data units from the memory region.
    Type: Grant
    Filed: January 10, 2024
    Date of Patent: April 14, 2026
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Soumitra Chatterjee, Chinmay Ghosh, Mashood Abdulla Kodavanji, Sharad Singhal
  • Publication number: 20260023696
    Abstract: Unused memory registrations in a remote memory system are proactively identified and freed. A memory server maintains a list of resource tracking entries for its outstanding memory registrations. The memory server continually monitors its list of resource tracking entities. When the memory server finds an unused memory registration in its list, it unregisters the corresponding shared memory region. The monitoring may be performed in the background of the memory server by, e.g., a monitor thread. As a result, unused memory registrations may be quickly released.
    Type: Application
    Filed: September 25, 2025
    Publication date: January 22, 2026
    Inventors: Gautham Bhat Kumbla, Mashood Abdulla Kodavanji, Sharad Singhal, Ramya Ahobala Rao, Chinmay Ghosh
  • Publication number: 20250335345
    Abstract: A system, by a processing entity (PE), determines records stored in a memory shared by other processing entities. A respective record comprises a key and a corresponding index indicating a physical location in the shared memory. The PE stores, in a DRAM partition, burst tree data obtained by performing a burst sort on a portion of the records. The PE moves data stored in the DRAM partition to a partition of the shared memory in response to a size of the stored data exceeding a predetermined threshold. The PE obtains sorted keys and corresponding indices for the records by sorting the burst tree data stored in shared memory partitions. The PE facilitates a sorted retrieval of the records in the shared memory while leaving the records in the respective physical location in the shared memory by writing the sorted keys and indices to the shared memory.
    Type: Application
    Filed: July 1, 2024
    Publication date: October 30, 2025
    Inventors: Ryan D. Menhusen, Clarete Riana Crasta, Syed Ismail Faizan Barmawer, Darel Neal Emmot, David R. Emberson, Sharad Singhal, Sajeesh Kumar K V, Ramesh Chandra Chaurasiya, Adya Sharma
  • Patent number: 12450130
    Abstract: In some examples, a system combines modified data tracking structures in a plurality of computer nodes into a combined tracking data structure, where a modified data tracking structure includes indicators of modified data portions in a network-attached memory. The system stores the combined tracking data structure at the network-attached memory. As part of an incremental data backup operation, the system uses the combined tracking data structure to provide the modified data portions from the network-attached memory to a backup storage system.
    Type: Grant
    Filed: August 11, 2023
    Date of Patent: October 21, 2025
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Mashood Abdulla Kodavanji, Clarete Riana Crasta, Gautham Bhat Kumbla, Syed Ismail Faizan Barmawer, Sharad Singhal, Chinmay Ghosh
  • Patent number: 12443518
    Abstract: A first process executing on a first HPC compute node of an HPC cluster sends a write command, including a global identifier for a memory window that is globally accessible to processes executing in the HPC cluster, to an HPC memory node of the HPC cluster instructing the HPC memory node to write first data to the memory window allocated at the HPC memory node. The first data is sent by the first process to a memory window allocated on the HPC memory node. The first data is written by the HPC memory node to the memory window that includes randomly accessed, addressable memory locations.
    Type: Grant
    Filed: February 14, 2024
    Date of Patent: October 14, 2025
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Soumitra Chatterjee, Chinmay Ghosh, Mashood Abdulla Kodavanji, Sharad Singhal
  • Patent number: 12443525
    Abstract: Some examples relate to providing a fabric-attached memory (FAM) for applications using message passing procedure. In an example, a remotely accessible memory creation function of a message passing procedure is modified to include a reference to a region of memory in a FAM. A remotely accessible memory data structure representing a remotely accessible memory is created through the remotely accessible memory creation function. When an application calls a message passing function of the message passing procedure, a determination is made whether the remotely accessible memory data structure in the message passing function includes a reference to the region of memory in the FAM. In response to a determination that the remotely accessible memory data structure includes a reference to the region of memory in the FAM, the message passing function call is routed to a FAM message passing function corresponding to the message passing function.
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: October 14, 2025
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Soumitra Chatterjee, Chinmay Ghosh, Mashood Abdulla Kodavanji, Sharad Singhal
  • Patent number: 12436902
    Abstract: Unused memory registrations in a remote memory system are proactively identified and freed. A memory server maintains a list of resource tracking entries for its outstanding memory registrations. The memory server continually monitors its list of resource tracking entities. When the memory server finds an unused memory registration in its list, it unregisters the corresponding shared memory region. The monitoring may be performed in the background of the memory server by, e.g., a monitor thread. As a result, unused memory registrations may be quickly released.
    Type: Grant
    Filed: April 10, 2024
    Date of Patent: October 7, 2025
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Gautham Bhat Kumbla, Mashood Abdulla Kodavanji, Sharad Singhal, Ramya Ahobala Rao, Chinmay Ghosh
  • Publication number: 20250291667
    Abstract: In certain embodiments, a method includes receiving, at a framework daemon, an indication to begin execution of a workload divided into execution units; accessing, by the framework daemon and in response to the indication, an execution context that includes the execution units; associating, by the framework daemon, an identifier of a node with an execution unit of the execution units to claim the execution unit for execution by the node; executing, by the node, the execution unit; accessing, by the framework daemon and after the node completes execution of the execution unit, the execution context to determine whether the execution context includes an unclaimed execution unit; associating, by the framework daemon and when the execution context includes an unclaimed execution unit, the identifier of the node with the unclaimed execution unit to claim the unclaimed execution unit for execution by the node; and executing, by the node, the execution unit.
    Type: Application
    Filed: June 6, 2024
    Publication date: September 18, 2025
    Inventors: Clarete Riana Crasta, Ramesh Chandra Chaurasiya, KrishnaPrasad Lingadahalli Shastry, Sharad Singhal, David R. Emberson
  • Publication number: 20250258767
    Abstract: A first process executing on a first HPC compute node of an HPC cluster sends a write command, including a global identifier for a memory window that is globally accessible to processes executing in the HPC cluster, to an HPC memory node of the HPC cluster instructing the HPC memory node to write first data to the memory window allocated at the HPC memory node. The first data is sent by the first process to a memory window allocated on the HPC memory node. The first data is written by the HPC memory node to the memory window that includes randomly accessed, addressable memory locations.
    Type: Application
    Filed: February 14, 2024
    Publication date: August 14, 2025
    Inventors: Soumitra Chatterjee, Chinmay Ghosh, Mashood Abdulla Kodavanji, Sharad Singhal
  • Publication number: 20250252066
    Abstract: Unused memory registrations in a remote memory system are proactively identified and freed. A memory server maintains a list of resource tracking entries for its outstanding memory registrations. The memory server continually monitors its list of resource tracking entities. When the memory server finds an unused memory registration in its list, it unregisters the corresponding shared memory region. The monitoring may be performed in the background of the memory server by, e.g., a monitor thread. As a result, unused memory registrations may be quickly released.
    Type: Application
    Filed: April 10, 2024
    Publication date: August 7, 2025
    Inventors: Gautham Bhat Kumbla, Mashood Abdulla Kodavanji, Sharad Singhal, Ramya Ahobala Rao, Chinmay Ghosh
  • Patent number: 12346602
    Abstract: In some examples, a system includes a plurality of memory servers managing access of data in a memory. A computer node includes a plurality of buffers associated with the memory servers. A processor executes a plurality of functions accessible by the computer node to access the data of the memory servers, the plurality of functions including associating, with the plurality of buffers, information specifying a type of an operation to be performed on the data using the plurality of buffers, queueing the operation in the plurality of buffers, initiating an execution of the operation, based on the type specified by the information, at the memory servers associated with the plurality of buffers, and providing results of the operation from the memory servers to the computer node.
    Type: Grant
    Filed: July 3, 2023
    Date of Patent: July 1, 2025
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Sharad Singhal, Rishi Kesh K Rajak, Mashood Abdulla Kodavanji, Cynara Justine, Syed Ismail Faizan Barmawer
  • Publication number: 20250193280
    Abstract: A system receives a first request to perform a collective operation. The system stores a mapping of a first virtual address to a descriptor for a physical location of an allocated memory region. The system performs the collective operation, by writing data to a first segment of the memory region and accessing data from other segments of the memory region. The system receives a second request to perform an update operation, the second request indicating the first virtual address, one or more portions of a memory region segment to be updated, and corresponding data units to write to the portions. The system updates, based on the mapping, only the indicated portions by writing the corresponding data units. The system performs a subsequent iteration of the collective operation, based on the mapping, by bypassing writing any data to the memory region and only accessing data units from the memory region.
    Type: Application
    Filed: January 10, 2024
    Publication date: June 12, 2025
    Inventors: Soumitra Chatterjee, Chinmay Ghosh, Mashood Abdulla Kodavanji, Sharad Singhal
  • Patent number: 12314787
    Abstract: In accordance with example implementations, a process includes receiving, by a connector that is associated with a compute node and is associated with a fabric-attached memory (FAM), an application programming interface (API) called to perform an operation that is associated with a hierarchical data format (HDF) object of an HDF file. The API call includes a HDF object identifier, which corresponds to the HDF object. The process includes, responsive to the request, based on the HDF object identifier, accessing, by the connector, mapping information that is stored in the FAM; and using, by the connector, the mapping information to identify a FAM descriptor corresponding to a first data item that is stored in the FAM and corresponds to the HDF object. The process includes, responsive to the request, serving, by the connector, the API call responsive to the identification of the FAM descriptor.
    Type: Grant
    Filed: April 27, 2023
    Date of Patent: May 27, 2025
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Chinmay Ghosh, Sharad Singhal, Porno Shome
  • Patent number: 12287734
    Abstract: In some examples, a computer identifies a plurality of memory servers accessible by the computer to perform remote access over a network of data stored by the plurality of memory servers, sends allocation requests to allocate memory segments to place interleaved data of the computer across the plurality of memory servers, and receives, at the computer in response to the allocation requests, metadata relating to the memory segments at the plurality of memory servers, the metadata comprising addresses of the memory segments at the plurality of memory servers. The computer uses the metadata to access, by the computer, the interleaved data at the plurality of memory servers, the interleaved data comprising blocks of data distributed across the memory segments.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: April 29, 2025
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Syed Ismail Faizan Barmawer, Gautham Bhat Kumbla, Mashood Abdulla Kodavanji, Clarete Riana Crasta, Sharad Singhal, Ramya Ahobala Rao
  • Publication number: 20250053482
    Abstract: In some examples, a system combines modified data tracking structures in a plurality of computer nodes into a combined tracking data structure, where a modified data tracking structure includes indicators of modified data portions in a network-attached memory. The system stores the combined tracking data structure at the network-attached memory. As part of an incremental data backup operation, the system uses the combined tracking data structure to provide the modified data portions from the network-attached memory to a backup storage system.
    Type: Application
    Filed: August 11, 2023
    Publication date: February 13, 2025
    Inventors: Mashood Abdulla Kodavanji, Clarete Riana Crasta, Gautham Bhat Kumbla, Syed Ismail Faizan Barmawer, Sharad Singhal, Chinmay Ghosh
  • Publication number: 20250021273
    Abstract: In some examples, a processor receives a first request to allocate a memory region for a collective operation by process entities in a plurality of computer nodes. In response to the first request, the processor creates a virtual address for the memory region and allocates the memory region in a network-attached memory coupled to the plurality of computer nodes over a network. The processor correlates the virtual address to an address of the memory region in mapping information. The processor identifies the memory region in the network-attached memory by obtaining the address of the memory region from the mapping information using the virtual address in a second request. In response to the second request, the processor performs the collective operation.
    Type: Application
    Filed: July 10, 2023
    Publication date: January 16, 2025
    Inventors: Soumitra Chatterjee, Chinmay Ghosh, Mashood Abdulla Kodavanji, Sharad Singhal
  • Publication number: 20250013386
    Abstract: In some examples, a system includes a plurality of memory servers managing access of data in a memory. A computer node includes a plurality of buffers associated with the memory servers. A processor executes a plurality of functions accessible by the computer node to access the data of the memory servers, the plurality of functions including associating, with the plurality of buffers, information specifying a type of an operation to be performed on the data using the plurality of buffers, queueing the operation in the plurality of buffers, initiating an execution of the operation, based on the type specified by the information, at the memory servers associated with the plurality of buffers, and providing results of the operation from the memory servers to the computer node.
    Type: Application
    Filed: July 3, 2023
    Publication date: January 9, 2025
    Inventors: Sharad Singhal, Rishi Kesh K Rajak, Mashood Abdulla Kodavanji, Cynara Justine, Syed Ismail Faizan Barmawer
  • Publication number: 20240406251
    Abstract: In some examples, a system having a plurality of computer nodes receives a command based on program code of a program being developed in an interactive programming session. The system distributes data items from a network-attached memory to a distributed data object having data in node memories of the plurality of computer nodes. A dataset manager performs an operation specified by the command on the distributed data object, the operation executed in parallel on the plurality of computer nodes. The dataset manager produces derived data generated by the operation on the distributed data object, the derived data accessible by a programmer in the interactive programming session.
    Type: Application
    Filed: October 26, 2023
    Publication date: December 5, 2024
    Inventors: Harumi Kuno, John L. Byrne, Paolo Faraboschi, Sharad Singhal
  • Publication number: 20240362163
    Abstract: Some examples relate to providing a fabric-attached memory (FAM) for applications using message passing procedure. In an example, a remotely accessible memory creation function of a message passing procedure is modified to include a reference to a region of memory in a FAM. A remotely accessible memory data structure representing a remotely accessible memory is created through the remotely accessible memory creation function. When an application calls a message passing function of the message passing procedure, a determination is made whether the remotely accessible memory data structure in the message passing function includes a reference to the region of memory in the FAM. In response to a determination that the remotely accessible memory data structure includes a reference to the region of memory in the FAM, the message passing function call is routed to a FAM message passing function corresponding to the message passing function.
    Type: Application
    Filed: April 28, 2023
    Publication date: October 31, 2024
    Inventors: Soumitra Chatterjee, Chinmay Ghosh, Mashood Abdulla Kodavanji, Sharad Singhal
  • Publication number: 20240362094
    Abstract: In accordance with example implementations, a process includes receiving, by a connector that is associated with a compute node and is associated with a fabric-attached memory (FAM), an application programming interface (API) called to perform an operation that is associated with a hierarchical data format (HDF) object of an HDF file. The API call includes a HDF object identifier, which corresponds to the HDF object. The process includes, responsive to the request, based on the HDF object identifier, accessing, by the connector, mapping information that is stored in the FAM; and using, by the connector, the mapping information to identify a FAM descriptor corresponding to a first data item that is stored in the FAM and corresponds to the HDF object. The process includes, responsive to the request, serving, by the connector, the API call responsive to the identification of the FAM descriptor.
    Type: Application
    Filed: April 27, 2023
    Publication date: October 31, 2024
    Inventors: Chinmay Ghosh, Sharad Singhal, Porno Shome