Abstract: A substrate is bonded to a conductive metallic flange via a free-standing heterostructure thermal interface material that includes physically distinct volumes of different conductive materials. The heterostructure thermal interface material (a bimetallic foil, for example) is metallurgically bonded to the bottom of the substrate on one side and metallurgically bonded to the flange on an opposite side. The constituent materials forming the thermal interface material and their dimensions can be chosen to achieve a desired thermal and/or electrical conductivity while allowing the coefficient of thermal expansion (CTE) to be matched to the substrate and/or the flange.

Abstract: Electronic device packages that include a cavity which can be gas-filled, evacuated, or filled by another material can be formed by stacking multiple circuit substrates (“carriers”) which are joined to together by interposers disposed between pairs of circuit substrates such that one or more cavities are formed between adjacent carriers. The interposers can include interconnections which can electrically couple devices or other structures on or within a first carrier to devices or structures on or within another carrier, including contacts formed on an exterior surface of a package.

Abstract: Electronic device packages that include one or more circuit substrates, one or more cavities defined by a cover separated from a circuit substrate by an interposer substrate with an aperture disposed above the circuit substrate can be formed by panel-level fabrication processes in which multiple assemblies are formed by singulating a larger panel assembly formed by multiples panels bonded to each other. A panel that includes multiple levels is partially diced to form channels which are filled with molding material. The subsequent structure is diced again to singulate individual stacked packages that include a portion of the molding material surrounding one or more interposers. The molding material can seal gaps between an interposer and a circuit substrate to which it is bonded, as well as providing electrical isolation between electrical interconnects that would otherwise be exposed at edges of each package.

Abstract: A substrate is bonded to a conductive metallic flange via a free-standing heterostructure thermal interface material that includes physically distinct volumes of different conductive materials. The heterostructure thermal interface material (a bimetallic foil, for example) is metallurgically bonded to the bottom of the substrate on one side and metallurgically bonded to the flange on an opposite side. The constituent materials forming the thermal interface material and their dimensions can be chosen to achieve a desired thermal and/or electrical conductivity while allowing the coefficient of thermal expansion (CTE) to be matched to the substrate and/or the flange.

Abstract: A thermal interface structure for transferring heat from an electronic component to a system heat sink includes a stack of one or more layers of a stiff thermal interface material and one or more layers of a compliant thermal interface material stacked on and connected to the one or more layers of the compliant thermal interface material. In some embodiments, the thermal interface structure also may include one or more layers of a shape memory alloy and/or a collapsible encasement.

Abstract: A thermal interface structure for transferring heat from an electronic component to a system heat sink includes a stack of one or more layers of a stiff thermal interface material and one or more layers of a compliant thermal interface material stacked on and connected to the one or more layers of the compliant thermal interface material. In some embodiments, the thermal interface structure also may include one or more layers of a shape memory alloy and/or a collapsible encasement.

Abstract: Power amplifier (PA) packages containing peripherally-encapsulated dies are provided, as are methods for fabricating such PA packages. In embodiments, a method for fabricating a PA package includes obtaining a die-substrate assembly containing a radio frequency (RF) power die, a package substrate, and a die bond layer. The die bond layer is composed of at least one metallic constituent and electrically couples a backside of the RF power die to the package substrate. A peripheral encapsulant body is formed around the RF power die and covers at least a portion of the die bond layer, while leaving at least a majority of a frontside of the RF power die uncovered. Before or after forming the peripheral encapsulant body, terminals of the PA package are interconnected with the RF power die; and a cover piece is bonded to the die-substrate assembly to enclose a gas-containing cavity within the PA package.