Patents by Inventor Sharan Kumar ALLUR

Sharan Kumar ALLUR has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11740941
    Abstract: The present invention describes a method of accelerating execution of one or more application tasks in a computing device using machine learning (ML) based model. According to one embodiment, a neural accelerating engine present in the computing device receives a ML input task for execution on the computing device from a user. The neural accelerating engine further retrieves a trained ML model and a corresponding optimal configuration file based on the received ML input task. Also, the current performance status of the computing device for executing the ML input task is obtained. Then, the neural accelerating engine dynamically schedules and dispatches parts of the ML input task to one or more processing units in the computing device for execution based on the retrieved optimal configuration file and the obtained current performance status of the computing device.
    Type: Grant
    Filed: February 23, 2018
    Date of Patent: August 29, 2023
    Inventors: Arun Abraham, Suhas Parlathaya Kudral, Balaji Srinivas Holur, Sarbojit Ganguly, Venkappa Mala, Suneel Kumar Surimani, Sharan Kumar Allur
  • Publication number: 20230153565
    Abstract: A method of deep neural network (DNN) modularization for optimal loading includes receiving, by an electronic device, a DNN model for execution, obtaining, by the electronic device, a plurality of parameters associated with the electronic device and a plurality of parameters associated with the DNN model, determining, by the electronic device, a number of sub-models of the DNN model and a splitting index, based on the obtained plurality of parameters associated with the electronic device and the obtained plurality of parameters associated with the DNN model, and splitting, by the electronic device, the received DNN model into a plurality of sub-models, based on the determined number of sub-models of the DNN model and the determined splitting index.
    Type: Application
    Filed: July 9, 2021
    Publication date: May 18, 2023
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Brijraj SINGH, Mayukh DAS, Yash Hemant JAIN, Sharan Kumar ALLUR, Venkappa MALA, Praveen Doreswamy NAIDU
  • Publication number: 20230127001
    Abstract: A method for generating an optimal neural network (NN) model may include determining intermediate outputs of the NN model by passing an input dataset through each intermediate exit gate of the plurality of intermediate exit gates, determining an accuracy score for each intermediate exit gate of the plurality of intermediate exit gates based on a comparison of the final output of the NN model with the intermediate output, identifying an earliest intermediate exit gate that produces the intermediate output closer to the final output based on the accuracy score, and generating the optimal NN model by removing remaining layers of the plurality of layers and remaining intermediate exit gates of the plurality of intermediate exit gates located after the determined earliest intermediate exit gate.
    Type: Application
    Filed: December 15, 2022
    Publication date: April 27, 2023
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Mayukh DAS, Brijraj SINGH, Pradeep NELAHONNE SHIVAMURTHAPPA, Aakash KAPOOR, Rajath Elias SOANS, Soham Vijay DIXIT, Sharan Kumar ALLUR, Venkappa MALA
  • Publication number: 20210350203
    Abstract: Embodiments herein provide a NAS method of generating an optimized DNN model for executing a task in an electronic device. The method includes identifying the task to be executed in the electronic device. The method includes estimating a performance parameter to be achieved while executing the task. The method includes determining hardware parameters of the electronic device required to execute the task based on the performance parameter and the task, and determining optimal neural blocks from a plurality of neural blocks based on the performance parameter and the hardware parameter of the electronic device. The method includes generating the optimized DNN model for executing the task based on the optimal neural blocks, and executing the task using the optimized DNN model.
    Type: Application
    Filed: March 24, 2021
    Publication date: November 11, 2021
    Inventors: Mayukh Das, Venkappa Mala, Brijraj Singh, Pradeep Nelahonne Shivamurthappa, Sharan Kumar Allur
  • Patent number: 10628214
    Abstract: The embodiments herein provide a method for scheduling an entity in a multi-core processor system including a big-core processor, and a little-core processor. The method includes detecting, by a scheduler, that a load contribution of the entity exceeds a load threshold. Further, the method includes determining, by the scheduler, whether the entity is one of a background entity, an IO intensive entity, a non-background entity, and a non-IO intensive entity based on at least one parameter. Further, the method includes instructing, by the scheduler, one of to schedule the entity on a little-core processor when the entity is at least one of the background entity and the IO intensive entity; and to schedule the entity on the big-core processor when the entity is at least one of the non-background entity and the non-IO intensive entity.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: April 21, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Aniruddha Banerjee, Sharan Kumar Allur, Syam Prasad Kuncha
  • Publication number: 20200065671
    Abstract: A method of processing a neural network model by using a plurality of processors includes allocating at least one slice to each layer from among a plurality of layers included in the neural network model, allocating each layer from among the plurality of layers to the plurality of processors based on respective processing times of the plurality of processors for processing each of the at least one slice, and processing the neural network model by using the plurality of processors based on a result of the allocation.
    Type: Application
    Filed: August 23, 2019
    Publication date: February 27, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Manas SAHNI, Arun Abraham, Sharan Kumar Allur, Venkappa Mala
  • Publication number: 20200019854
    Abstract: The present invention describes a method of accelerating execution of one or more application tasks in a computing device using machine learning (ML) based model. According to one embodiment, a neural accelerating engine present in the computing device receives a ML input task for execution on the computing device from a user. The neural accelerating engine further retrieves a trained ML model and a corresponding optimal configuration file based on the received ML input task. Also, the current performance status of the computing device for executing the ML input task is obtained. Then, the neural accelerating engine dynamically schedules and dispatches parts of the ML input task to one or more processing units in the computing device for execution based on the retrieved optimal configuration file and the obtained current performance status of the computing device.
    Type: Application
    Filed: February 23, 2018
    Publication date: January 16, 2020
    Inventors: Arun ABRAHAM, Suhas Parlathaya KUDRAL, Balaji Srinivas HOLUR, Sarbojit GANGULY, Venkappa MALA, Suneel Kumar SURIMANI, Sharan Kumar ALLUR
  • Publication number: 20180260243
    Abstract: The embodiments herein provide a method for scheduling an entity in a multi-core processor system including a big-core processor, and a little-core processor. The method includes detecting, by a scheduler, that a load contribution of the entity exceeds a load threshold. Further, the method includes determining, by the scheduler, whether the entity is one of a background entity, an IO intensive entity, a non-background entity, and a non-IO intensive entity based on at least one parameter. Further, the method includes instructing, by the scheduler, one of to schedule the entity on a little-core processor when the entity is at least one of the background entity and the IO intensive entity; and to schedule the entity on the big-core processor when the entity is at least one of the non-background entity and the non-IO intensive entity.
    Type: Application
    Filed: June 1, 2016
    Publication date: September 13, 2018
    Inventors: Aniruddha BANERJEE, Sharan Kumar ALLUR, Syam Prasad KUNCHA