Patents by Inventor Sharath GARGESHWARI

Sharath GARGESHWARI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10848257
    Abstract: An apparatus and method for timestamping data packets are provided. The apparatus includes an input bit counter responsive to input bits entering a physical layer (PHY) device and an output bit counter responsive to output bits transmitted by the PHY device. A timestamp for an incoming bit is calculated based on a number of bits awaiting transmission by the PHY device at the time of arrival of the incoming bit. The number of bits awaiting transmission by the PHY device is determined based on the first count and the second count.
    Type: Grant
    Filed: September 24, 2019
    Date of Patent: November 24, 2020
    Assignee: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
    Inventors: Eric Baden, Ankit Bansal, Sharath Gargeshwari
  • Publication number: 20200021381
    Abstract: An apparatus and method for timestamping data packets are provided. The apparatus includes an input bit counter responsive to input bits entering a physical layer (PHY) device and an output bit counter responsive to output bits transmitted by the PHY device. A timestamp for an incoming bit is calculated based on a number of bits awaiting transmission by the PHY device at the time of arrival of the incoming bit. The number of bits awaiting transmission by the PHY device is determined based on the first count and the second count.
    Type: Application
    Filed: September 24, 2019
    Publication date: January 16, 2020
    Applicant: Avago Technologies International Sales Pte. Limited
    Inventors: Eric BADEN, Ankit BANSAL, Sharath GARGESHWARI
  • Patent number: 10432337
    Abstract: An apparatus and method for timestamping data packets are provided. The apparatus includes an input bit counter responsive to input bits entering a physical layer (PHY) device and an output bit counter responsive to output bits transmitted by the PHY device. A timestamp for an incoming bit is calculated based on a number of bits awaiting transmission by the PHY device at the time of arrival of the incoming bit. The number of bits awaiting transmission by the PHY device is determined based on the first count and the second count.
    Type: Grant
    Filed: May 10, 2016
    Date of Patent: October 1, 2019
    Assignee: Avago Technologies International Sales Pte. Limited
    Inventors: Eric Baden, Ankit Bansal, Sharath Gargeshwari
  • Publication number: 20160337114
    Abstract: An apparatus and method for timestamping data packets are provided. The apparatus includes an input bit counter responsive to input bits entering a physical layer (PHY) device and an output bit counter responsive to output bits transmitted by the PHY device. A timestamp for an incoming bit is calculated based on a number of bits awaiting transmission by the PHY device at the time of arrival of the incoming bit. The number of bits awaiting transmission by the PHY device is determined based on the first count and the second count.
    Type: Application
    Filed: May 10, 2016
    Publication date: November 17, 2016
    Applicant: Broadcom Corporation
    Inventors: Eric BADEN, Ankit BANSAL, Sharath GARGESHWARI