Patents by Inventor Shari Farrens
Shari Farrens has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20200066574Abstract: A substrate includes a polycrystalline ceramic core; a first adhesion layer encapsulating the polycrystalline ceramic core; a conductive layer encapsulating the first adhesion layer; a second adhesion layer encapsulating the conductive layer; a barrier layer encapsulating the second adhesion layer, and a bonding layer coupled to the barrier layer, and a substantially single crystalline silicon layer coupled to the bonding layer.Type: ApplicationFiled: November 4, 2019Publication date: February 27, 2020Applicant: QROMIS, Inc.Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
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Patent number: 10566190Abstract: A method of fabricating a ceramic substrate structure includes providing a ceramic substrate, encapsulating the ceramic substrate in a barrier layer, and forming a bonding layer coupled to the barrier layer. The method further includes removing a portion of the bonding layer to expose at least a portion of the barrier layer and define fill regions, and depositing a second bonding layer on the at least a portion of the exposed barrier layer and the fill regions.Type: GrantFiled: October 16, 2018Date of Patent: February 18, 2020Assignee: Qromis, Inc.Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
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Patent number: 10510582Abstract: A substrate includes a polycrystalline ceramic core; a first adhesion layer encapsulating the polycrystalline ceramic core; a conductive layer encapsulating the first adhesion layer; a second adhesion layer encapsulating the conductive layer; a barrier layer encapsulating the second adhesion layer, and a bonding layer coupled to the barrier layer, and a substantially single crystalline silicon layer coupled to the bonding layer.Type: GrantFiled: June 13, 2017Date of Patent: December 17, 2019Assignee: Qromis, Inc.Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
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Publication number: 20190348275Abstract: A method of fabricating a semiconductor structure includes providing an engineered substrate including a polycrystalline substrate, a barrier layer encapsulating the polycrystalline substrate, and a bonding layer coupled to the barrier layer. The method further includes forming a first silicon layer coupled to the bonding layer, forming a dielectric layer coupled to the first silicon layer, forming a second silicon layer coupled to the dielectric layer, removing a portion of the second silicon layer and a corresponding portion of the dielectric layer to expose a portion of the first silicon layer, forming a gallium nitride (GaN) layer coupled to the exposed portion of the first silicon layer, forming a gallium nitride (GaN) based device coupled to the GaN layer, and forming a silicon-based device coupled to a remaining portion of the second silicon layer.Type: ApplicationFiled: July 29, 2019Publication date: November 14, 2019Applicant: QROMIS, Inc.Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens, Ozgur Aktas
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Patent number: 10438792Abstract: A method of fabricating a semiconductor structure includes providing an engineered substrate including a polycrystalline substrate, a barrier layer encapsulating the polycrystalline substrate, and a bonding layer coupled to the barrier layer. The method further includes forming a first silicon layer coupled to the bonding layer, forming a dielectric layer coupled to the first silicon layer, forming a second silicon layer coupled to the dielectric layer, removing a portion of the second silicon layer and a corresponding portion of the dielectric layer to expose a portion of the first silicon layer, forming a gallium nitride (GaN) layer coupled to the exposed portion of the first silicon layer, forming a gallium nitride (GaN) based device coupled to the GaN layer, and forming a silicon-based device coupled to a remaining portion of the second silicon layer.Type: GrantFiled: October 19, 2017Date of Patent: October 8, 2019Assignee: Qromis, Inc.Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens, Ozgur Aktas
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Publication number: 20190198311Abstract: A method of manufacturing a substrate includes forming a support structure by providing a polycrystalline ceramic core, encapsulating the polycrystalline ceramic core in a first adhesion shell, encapsulating the first adhesion shell in a conductive shell, encapsulating the conductive shell in a second adhesion shell, and encapsulating the second adhesion shell in a barrier shell. The method also includes joining a bonding layer to the support structure, joining a substantially single crystalline silicon layer to the bonding layer, forming an epitaxial silicon layer by epitaxial growth on the substantially single crystalline silicon layer, and forming one or more epitaxial III-V layers by epitaxial growth on the epitaxial silicon layer.Type: ApplicationFiled: February 27, 2019Publication date: June 27, 2019Applicant: QROMIS, Inc.Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
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Publication number: 20190181121Abstract: An interposer includes a polycrystalline ceramic core disposed between a first surface and a second surface of the interposer, an adhesion layer encapsulating the polycrystalline ceramic core, a barrier layer encapsulating the adhesion layer, and one or more electrically conductive vias extending from the first surface to the second surface through the polycrystalline ceramic core, the adhesion layer, and the barrier layer.Type: ApplicationFiled: December 12, 2018Publication date: June 13, 2019Applicant: QROMIS, Inc.Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
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Patent number: 10297445Abstract: A substrate includes a support structure comprising: a polycrystalline ceramic core; a first adhesion layer coupled to the polycrystalline ceramic core; a conductive layer coupled to the first adhesion layer; a second adhesion layer coupled to the conductive layer; and a barrier layer coupled to the second adhesion layer. The substrate also includes a silicon oxide layer coupled to the support structure, a substantially single crystalline silicon layer coupled to the silicon oxide layer, and an epitaxial III-V layer coupled to the substantially single crystalline silicon layer.Type: GrantFiled: June 13, 2017Date of Patent: May 21, 2019Assignee: Qromis, Inc.Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
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Publication number: 20190139859Abstract: An electronic device includes a support structure comprising a polycrystalline ceramic core, a first adhesion layer coupled to the polycrystalline ceramic core, a conductive layer coupled to the first adhesion layer, a second adhesion layer coupled to the conductive layer, and a barrier layer coupled to the second adhesion layer. The electronic device also includes a buffer layer coupled to the support structure, a contact layer coupled to the buffer layer, and a field-effect transistor (FET) coupled to the contact layer.Type: ApplicationFiled: November 2, 2018Publication date: May 9, 2019Applicant: QROMIS, Inc.Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens, Ozgur Aktas
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Publication number: 20190115208Abstract: A method of fabricating a ceramic substrate structure includes providing a ceramic substrate, encapsulating the ceramic substrate in a barrier layer, and forming a bonding layer coupled to the barrier layer. The method further includes removing a portion of the bonding layer to expose at least a portion of the barrier layer and define fill regions, and depositing a second bonding layer on the at least a portion of the exposed barrier layer and the fill regions.Type: ApplicationFiled: October 16, 2018Publication date: April 18, 2019Applicant: QROMIS, Inc.Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
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Patent number: 10134589Abstract: A method of fabricating a ceramic substrate structure includes providing a ceramic substrate, encapsulating the ceramic substrate in a barrier layer, and forming a bonding layer coupled to the barrier layer. The method further includes removing a portion of the bonding layer to expose at least a portion of the barrier layer and define fill regions, and depositing a second bonding layer on the at least a portion of the exposed barrier layer and the fill regions.Type: GrantFiled: June 13, 2017Date of Patent: November 20, 2018Assignee: Qromis, Inc.Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
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Patent number: 10074567Abstract: A method of fabricating a semiconductor structure includes providing an engineered substrate including a polycrystalline substrate, a barrier layer encapsulating the polycrystalline substrate, and a bonding layer coupled to the barrier layer. The method further includes forming a first silicon layer coupled to the bonding layer, forming a dielectric layer coupled to the first silicon layer, forming a second silicon layer coupled to the dielectric layer, forming a GaN layer coupled to the second silicon layer, forming a GaN based device coupled to the GaN layer, removing the engineered substrate to expose a back surface of the first silicon layer, forming a silicon based device coupled to the back surface of the first silicon layer, forming a via from the back surface of the first silicon layer, filling the via with a conducting material, and interconnecting the GaN based device and the silicon based device through the via.Type: GrantFiled: October 19, 2017Date of Patent: September 11, 2018Assignee: QROMIS, Inc.Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
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Publication number: 20180114726Abstract: A method of fabricating a semiconductor structure includes providing an engineered substrate including a polycrystalline substrate, a barrier layer encapsulating the polycrystalline substrate, and a bonding layer coupled to the barrier layer. The method further includes forming a first silicon layer coupled to the bonding layer, forming a dielectric layer coupled to the first silicon layer, forming a second silicon layer coupled to the dielectric layer, forming a GaN layer coupled to the second silicon layer, forming a GaN based device coupled to the GaN layer, removing the engineered substrate to expose a back surface of the first silicon layer, forming a silicon based device coupled to the back surface of the first silicon layer, forming a via from the back surface of the first silicon layer, filling the via with a conducting material, and interconnecting the GaN based device and the silicon based device through the via.Type: ApplicationFiled: October 19, 2017Publication date: April 26, 2018Applicant: QROMIS, Inc.Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
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Publication number: 20180114693Abstract: A method of fabricating a semiconductor structure includes providing an engineered substrate including a polycrystalline substrate, a barrier layer encapsulating the polycrystalline substrate, and a bonding layer coupled to the barrier layer. The method further includes forming a first silicon layer coupled to the bonding layer, forming a dielectric layer coupled to the first silicon layer, forming a second silicon layer coupled to the dielectric layer, removing a portion of the second silicon layer and a corresponding portion of the dielectric layer to expose a portion of the first silicon layer, forming a gallium nitride (GaN) layer coupled to the exposed portion of the first silicon layer, forming a gallium nitride (GaN) based device coupled to the GaN layer, and forming a silicon-based device coupled to a remaining portion of the second silicon layer.Type: ApplicationFiled: October 19, 2017Publication date: April 26, 2018Applicant: QROMIS, Inc.Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens, Ozgur Aktas
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Publication number: 20180047558Abstract: A substrate includes a support structure comprising: a polycrystalline ceramic core; a first adhesion layer coupled to the polycrystalline ceramic core; a conductive layer coupled to the first adhesion layer; a second adhesion layer coupled to the conductive layer; and a barrier layer coupled to the second adhesion layer. The substrate also includes a silicon oxide layer coupled to the support structure, a substantially single crystalline silicon layer coupled to the silicon oxide layer, and an epitaxial layer coupled to the substantially single crystalline silicon layer.Type: ApplicationFiled: June 13, 2017Publication date: February 15, 2018Applicant: QUORA TechnologyInventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
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Publication number: 20180047557Abstract: A method of fabricating a ceramic substrate structure includes providing a ceramic substrate, encapsulating the ceramic substrate in a barrier layer, and forming a bonding layer coupled to the barrier layer. The method further includes removing a portion of the bonding layer to expose at least a portion of the barrier layer and define fill regions, and depositing a second bonding layer on the at least a portion of the exposed barrier layer and the fill regions.Type: ApplicationFiled: June 13, 2017Publication date: February 15, 2018Applicant: QUORA Technology, Inc.Inventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens
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Publication number: 20180047618Abstract: A substrate includes a polycrystalline ceramic core; a first adhesion layer encapsulating the polycrystalline ceramic core; a conductive layer encapsulating the first adhesion layer; a second adhesion layer encapsulating the conductive layer; a barrier layer encapsulating the second adhesion layer, and a bonding layer coupled to the barrier layer, and a substantially single crystalline silicon layer coupled to the bonding layer.Type: ApplicationFiled: June 13, 2017Publication date: February 15, 2018Applicant: QUORA TechnologyInventors: Vladimir Odnoblyudov, Cem Basceri, Shari Farrens