Abstract: Thermal coupling effects are represented as current into a thermal node of an initial design structure. The current is determined using a thermal coupling coefficient, and thermal resistance and thermal capacitance of a self-heating network of the initial design structure. By using another design structure with devices substantially identical to those of the initial design structure at known locations, operating a device as a heater while operating another device as a heat sensor, and measuring thermal response of the heater and the heat sensor, a thermal coupling coefficient may be determined.

Abstract: Thermal coupling effects are represented as current into a thermal node of an initial design structure. The current is determined using a thermal coupling coefficient, and thermal resistance and thermal capacitance of a self-heating network of the initial design structure. By using another design structure with devices substantially identical to those of the initial design structure at known locations, operating a device as a heater while operating another device as a heat sensor, and measuring thermal response of the heater and the heat sensor, a thermal coupling coefficient may be determined.

Abstract: A semiconductor wafer is provided with one or more parameter scaling metric (PSM) groupings. Each PSM grouping includes a first device having a known active region geometry and further includes a set of one or more devices having active region geometry dimensions in a known relationship with the active region geometry of the first device. One or more parameter scaling metrics are calculated using measured values of one or more active region parameters of interest. The parameter scaling metric(s) can be used to quantify the stability and uniformity of a fabrication process used to make the semiconductor wafer.

Abstract: A semiconductor wafer is provided with one or more parameter scaling metric (PSM) groupings. Each PSM grouping includes a first device having a known active region geometry and further includes a set of one or more devices having active region geometry dimensions in a known relationship with the active region geometry of the first device. One or more parameter scaling metrics are calculated using measured values of one or more active region parameters of interest. The parameter scaling metric(s) can be used to quantify the stability and uniformity of a fabrication process used to make the semiconductor wafer.

Abstract: A method and apparatus for testing ADC circuitry. The method and apparatus detects infrequently occurring errors by providing a series of waveforms to the ADC that have different amplitude, frequency, or voltage offset from one another. The outputs of the ADC for the waveforms are then analyzed for timing related errors.

Abstract: A method and apparatus for testing ADC circuitry. The method and apparatus detects infrequently occurring errors by providing a series of waveforms to the ADC that have different amplitude, frequency, or voltage offset from one another. The outputs of the ADC for the waveforms are then analyzed for timing related errors.

Abstract: A method and structure for calibrating an analog to digital converter comprises an input signal; a driver receiving the input signal, wherein the driver outputs a driver output signal; a flash circuit receiving the driver output signal, wherein the flash circuit outputs a comparison result equaling 2n−1 digital outputs; an encoding logic unit encoding the comparison result into n digital bits as an output signal; a calibration engine outputting a calibration input adjust signal, a reference adjust signal, a driver gain adjust signal, a driver offset adjust signal; and a calibration input circuit receiving the calibration input adjust signal, wherein the driver receives the driver gain adjust signal and the driver offset adjust signal, wherein the flash circuit receives the reference adjust signal, wherein the calibration engine receives n digital bits, and controls an operation of the driver or flash circuit based on the output signal.

Abstract: A method and structure for calibrating an analog to digital converter comprises an input signal; a driver receiving the input signal, wherein the driver outputs a driver output signal; a flash circuit receiving the driver output signal, wherein the flash circuit outputs a comparison result equaling 2n−1 digital outputs; an encoding logic unit encoding the comparison result into n digital bits as an output signal; a calibration engine outputting a calibration input adjust signal, a reference adjust signal, a driver gain adjust signal, a driver offset adjust signal; and a calibration input circuit receiving the calibration input adjust signal, wherein the driver receives the driver gain adjust signal and the driver offset adjust signal, wherein the flash circuit receives the reference adjust signal, wherein the calibration engine receives n digital bits, and controls an operation of the driver or flash circuit based on the output signal.

Abstract: By providing data to a selection switch via a multiplexor so it can be programmed to supply either a current programmably controlled by a shift register or a current fixed by a fused resistor. Selected signals coupled to the multiplexor control the selection of either the resistor or the shift register thus, providing an improved current selection device which is capable of automatically selecting and programming the current supplied to circuits such as digital to analog converters.