Abstract: Techniques are described for querying on hybrid formats and storages by a DBMS to leverage faster mirror format (MF) data and completeness of persistent format (PF) data. In an embodiment, the DBMS receives a query that specifies both in-memory and disk-only columns. The DBMS identifies that a scan-based operation is referencing an in-memory column stored within both MF and PF data. The DBMS may initiate performing the operation on the in-memory column on one of the formats of data. While doing so, the DBMS may determine that the actual improvement metric for the operation on the selected format data is not achieving the desired improvement. If so, the DBMS may dynamically switch the performing of the scan-based operation to the other format of the same data.

Abstract: Techniques are described herein for hybrid parallelization of in-memory table scans. Work for an in-memory scan is divided into granules based on a degree of parallelism. The granules are assigned to one or more processes. The work for each granule is further parallelized by dividing the work granule into one or more tasks. The tasks are assigned to one or more threads, the number of which can be dynamically adjusted.

Abstract: Techniques are described for querying on hybrid formats and storages by a DBMS to leverage faster mirror format (MF) data and completeness of persistent format (PF) data. In an embodiment, the DBMS receives a query that specifies both in-memory and disk-only columns. The DBMS identifies that a scan-based operation is referencing an in-memory column stored within both MF and PF data. The DBMS may initiate performing the operation on the in-memory column on one of the formats of data. While doing so, the DBMS may determine that the actual improvement metric for the operation on the selected format data is not achieving the desired improvement. If so, the DBMS may dynamically switch the performing of the scan-based operation to the other format of the same data.

Abstract: Approaches are described to improve database performance by implementing a RLE decompression function at a low level within a general-purpose processor or an external block. Specifically, embodiments of a hardware implementation of an instruction for RLE decompression are disclosed. The described approaches improve performance by supporting the RLE decompression function within a processor and/or external block. Specifically, a RLE decompression hardware implementation is disclosed that produces a 64-bit RLE decompression result, with an example embodiment performing the task in two pipelined execution stages with a throughput of one per cycle. According to embodiments, hardware organization of narrow-width shifters operating in parallel, controlled by computed shift counts, is used to perform the decompression.

Abstract: Techniques related to accelerated detection of matching patterns are disclosed. In an embodiment, a method may involve, for a single field of a body of records, contiguously storing field values, thereby storing the field values as a concatenation. The method may also involve identifying a match in the concatenation that matches a value pattern specified by a value pattern expression. The value pattern may include a first partial pattern and a second partial pattern. Further, the method may involve determining that the match is contained in a single field value of the body of records. Still further, the method may involve establishing the match as a matching value. The match may be determined to be contained in the single field value based on searching a data structure comprising length information or offset information for a subset of the field values stored as the concatenation.

Abstract: Techniques are described herein for hybrid parallelization of in-memory table scans. Work for an in-memory scan is divided into granules based on a degree of parallelism. The granules are assigned to one or more processes. The work for each granule is further parallelized by dividing the work granule into one or more tasks. The tasks are assigned to one or more threads, the number of which can be dynamically adjusted.

Abstract: Techniques related to accelerated detection of matching patterns are disclosed. In an embodiment, a method may involve, for a single field of a body of records, contiguously storing field values, thereby storing the field values as a concatenation. The method may also involve identifying a match in the concatenation that matches a value pattern specified by a value pattern expression. The value pattern may include a first partial pattern and a second partial pattern. Further, the method may involve determining that the match is contained in a single field value of the body of records. Still further, the method may involve establishing the match as a matching value. The match may be determined to be contained in the single field value based on searching a data structure comprising length information or offset information for a subset of the field values stored as the concatenation.

Abstract: Approaches are described to improve database performance by implementing a RLE decompression function at a low level within a general-purpose processor or an external block. Specifically, embodiments of a hardware implementation of an instruction for RLE decompression are disclosed. The described approaches improve performance by supporting the RLE decompression function within a processor and/or external block. Specifically, a RLE decompression hardware implementation is disclosed that produces a 64-bit RLE decompression result, with an example embodiment performing the task in two pipelined execution stages with a throughput of one per cycle. According to embodiments, hardware organization of narrow-width shifters operating in parallel, controlled by computed shift counts, is used to perform the decompression.

Abstract: A method and apparatus to insert special instruction. At least one of the illustrative embodiments is a method comprising converting a first representation of a computer program to a second representation, and inserting into the second representation a special instruction not needed to implement functionality in the first representation. The special instruction gives duplicate copies of the computer program executed in different processors an opportunity to service external asynchronous interrupts.

Abstract: An apparatus generates a debugger script to output first data corresponding to a symbol name for a breakpoint in a software program compiled as optimized code. A debugger script to output second data corresponding to the symbol name for the breakpoint in the software program compiled as unoptimized code is also generated. The apparatus further compares the first data to the second data, and indicates whether there is a difference between the first data and the second data.