Patents by Inventor Shashij Singh

Shashij Singh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7039072
    Abstract: Multiple streams of bits are received. One or more bits are selected from a stream of bits based, at least in part, on a space control register value and a time control register value. In one embodiment, a time control register stores a value indicating a selected bit from a sequence of bits, a counter counts bits in the sequence of bits from a predetermined bit, and a comparator is coupled to the time control register and to the counter to generate a load signal when a value stored in the time control register and a value provided by the counter are equal. The load signal causes the latch to load a value output by the multiplexer.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: May 2, 2006
    Assignee: CIENA Corporation
    Inventors: Alnoor M. Shivji, Sunil Tomar, Shashij Singh
  • Patent number: 6834049
    Abstract: Methods and apparatuses for laying out an integrated circuit include a first plurality of I/O ports that are positioned along the first side, a plurality of queues that are coupled to the first plurality of I/O ports, a first bus that is positioned extending from the plurality of queues toward the second side to couple a control circuit to the plurality of queues, second plurality of I/O ports that are positioned along the third side and the fourth side, and a second bus that is positioned between the control circuit and the second plurality of I/O ports to couple the control circuit to the second plurality of I/O ports, wherein the first bus and the second bus are positioned such that the respective bus lines do not cross over each other. A time and space switching apparatus and component cell permit a bit within a data line to be selected.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: December 21, 2004
    Assignee: Ciena Corporation
    Inventors: Sunil Tomar, Shashij Singh
  • Patent number: 6597214
    Abstract: A clock signal is received. A synchronization signal is compared to the clock signal to determine whether the synchronization signal is asserted within a predetermined period of time with respect to clock signal cycles. The synchronization signal assertion is used to synchronize a circuit to an external event, if the synchronization signal assertion is received within the predetermined period of time. If the synchronization signal assertion is not received within the predetermined period of time the circuit is not synchronized.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: July 22, 2003
    Assignee: Ciena Corporation
    Inventors: Shashij Singh, Sunil Tomar