Patents by Inventor Shau-Chuo Wen

Shau-Chuo Wen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7682960
    Abstract: A wafer structure and a method for fabricating the same are provided. First, a wafer having a pad and a first protection layer with a first opening is provided. Next, a second protection layer with a second opening is formed on the first protection layer. Part of the pad and the first protection layer are exposed from the openings. The edges of the openings construct a step structure. Following that, an adhesion layer is formed on the pad, the step structure and the second protection layer. Afterwards, a photo-resist layer with a third opening is formed on the adhesion layer. Then, a barrier layer is electroplated onto part of the adhesion layer. Further, a wetting layer is formed on the barrier layer, and then the photo-resist layer and part of the adhesion layer exposed outside the barrier layer are removed. Finally, a solder layer is printed onto the wetting layer.
    Type: Grant
    Filed: March 11, 2008
    Date of Patent: March 23, 2010
    Assignee: Advanced Semiconductor Engineering, Inc.
    Inventor: Shau-Chuo Wen
  • Publication number: 20080299757
    Abstract: A wafer structure and a method for fabricating the same are provided. First, a wafer having a pad and a first protection layer with a first opening is provided. Next, a second protection layer with a second opening is formed on the first protection layer. Part of the pad and the first protection layer are exposed from the openings. The edges of the openings construct a step structure. Following that, an adhesion layer is formed on the pad, the step structure and the second protection layer. Afterwards, a photo-resist layer with a third opening is formed on the adhesion layer. Then, a barrier layer is electroplated onto part of the adhesion layer. Further, a wetting layer is formed on the barrier layer, and then the photo-resist layer and part of the adhesion layer exposed outside the barrier layer are removed. Finally, a solder layer is printed onto the wetting layer.
    Type: Application
    Filed: March 11, 2008
    Publication date: December 4, 2008
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Shau-Chuo Wen
  • Publication number: 20040207065
    Abstract: A stack-type multi-chip package at least comprising a substrate, a first chip, a second chip, a plurality of bump pads, a plurality of bumps, a plurality of first conductive wires, a plurality of second conductive wires and some packaging material. The backside of the first chip is attached to the substrate. The second chip is assembled to the active surface of the first chip. The bump pads are positioned on the backside of the second chip. The bumps are sandwiched between the first chip and the second chip such that the bumps are bonded to the first chip and the bump pads. The first chip and the second chip are electrically connected to the substrate through the first conductive wires and the second conductive wires. The packaging material encapsulates the first chip, the second chip, the bumps, the first conductive wires and the second conductive wires.
    Type: Application
    Filed: April 19, 2004
    Publication date: October 21, 2004
    Inventors: Chih-Huang Chang, Shau-Chuo Wen