Patents by Inventor Shaul Shulman

Shaul Shulman has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9954712
    Abstract: Methods and architectures for blind detection of physical layer control (PLC) signaling for transmitters and receivers having respective misaligned inverse fast Fourier transforms (IFFTs) and (FFTs) includes opening a frequency tracking offset calibration circuit, estimating or calculating a phase discontinuity due to FFT misalignment, closing the frequency tracking offset calibration circuit and applying a frequency correction that includes a frequency offset less the calculated or estimated phase discontinuity.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: April 24, 2018
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Thushara Hewavithana, Sahan S. Gamage, Shaul Shulman
  • Publication number: 20180048417
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Application
    Filed: October 23, 2017
    Publication date: February 15, 2018
    Applicant: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Patent number: 9780969
    Abstract: Systems, apparatus and methods are described including operations for demodulating, via a front end demodulator of an analog front end processor, at least a portion of digital sample data into front end demodulated data. A framer of the analog front end processor may frame data from a selection of the front end demodulated data as well as undemodulated digital sample data remaining from the digital sample data, into frames of front end demodulated data and/or undemodulated digital sample data.
    Type: Grant
    Filed: December 23, 2014
    Date of Patent: October 3, 2017
    Assignee: Intel Corporation
    Inventors: Shaul Shulman, Amos Klimker, Elihay Shalem, Eran Eran Vodevoz
  • Publication number: 20170272201
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Application
    Filed: April 5, 2017
    Publication date: September 21, 2017
    Applicant: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Patent number: 9634795
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Grant
    Filed: March 4, 2014
    Date of Patent: April 25, 2017
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Publication number: 20160182265
    Abstract: Systems, apparatus and methods are described including operations for transferring data between elements of a cable communication device.
    Type: Application
    Filed: December 23, 2014
    Publication date: June 23, 2016
    Inventors: SHAUL SHULMAN, AMOS KLIMKER, ELIHAY SHALEM, ERAN ERAN VODEVOZ
  • Patent number: 9225499
    Abstract: Some demonstrative embodiments include devices, systems and methods of transferring information between elements of a communication device. For example, a device may include a front-end to receive an analog downstream input including a plurality of downstream data channels, and to provide a digital serial downstream output including at least one continuous stream of constant-size downstream frames including a plurality of constant-size downstream data frames, which include downstream sample data of the plurality of downstream data channels; a serial interface including at least one serial lane to transfer the at least on stream of the digital serial downstream output; and a processor to receive the digital serial downstream over the serial interface, and to process the downstream data frames.
    Type: Grant
    Filed: March 28, 2012
    Date of Patent: December 29, 2015
    Assignee: INTEL CORPORATION
    Inventors: Shaul Shulman, Dmitrii A. Loukianov, Naor Goldman, Bernard Arambepola
  • Publication number: 20140247782
    Abstract: Mixed mode constellation mapping to map a data block to a block of sub-carriers based on a configurable set of one or more constellation mapping schemes, and corresponding mixed mode least likelihood ratio (LLR) de-mapping based on the configurable set of one or more modulation schemes. The set may be configurable to include multiple modulation schemes to provide to a SEvSNR measure that is a non-weighted or weighted average of SEvSNR measures of the multiple modulation schemes. Mixed mode constellation mapping may be useful be configurable to control spectral efficiency versus SNR (SEvSNR) over a range of SNR with relatively fine SNR granularity, and may be configurable to control SEvSNR over a range of SNR at a fixed FEC code rate, which may include a highest available or highest permitted code rate.
    Type: Application
    Filed: March 4, 2014
    Publication date: September 4, 2014
    Inventors: Bernard Arambepola, Noam Tal, Sahan S. Gamage, Thushara Hewavithana, Shaul Shulman
  • Patent number: 8781052
    Abstract: A system and method are described to provide a next generation cable gateway/modem based on the DOCSIS standard with a scheme to synchronously combine channels in the physical layer to increase overall bit rates for coaxial cable data transmission. The systems and methods synchronize the counters associated with multiple channels, including continuity counters, at the transmitter to zero and then allow the counters on individual channels to increment individually. At the receiver, individual channel delays of individual channels will be thus recognizable based on the information provided by the counters associated with each channel. A buffer at the receiver is informed and used to individually delay one or more of the multiple channels to marry up continuity counter values. In this manner, the buffer acts to essentially equalize delays in individual channels with the continuity counter representing the mechanism for specifying the individual delays for the separate channels.
    Type: Grant
    Filed: June 21, 2012
    Date of Patent: July 15, 2014
    Assignee: Intel Corporation
    Inventors: Bernard Arambepola, Shaul Shulman, Naor Goldman, Amos Klimker, Noam Tal
  • Publication number: 20130343501
    Abstract: A system and method are described to provide a next generation cable gateway/modem based on the DOCSIS standard with a scheme to synchronously combine channels in the physical layer to increase overall bit rates for coaxial cable data transmission. The systems and methods synchronize the counters associated with multiple channels, including continuity counters, at the transmitter to zero and then allow the counters on individual channels to increment individually. At the receiver, individual channel delays of individual channels will be thus recognizable based on the information provided by the counters associated with each channel. A buffer at the receiver is informed and used to individually delay one or more of the multiple channels to many up continuity counter values. In this manner, the buffer acts to essentially equalize delays in individual channels with the continuity counter representing the mechanism for specifying the individual delays for the separate channels.
    Type: Application
    Filed: June 21, 2012
    Publication date: December 26, 2013
    Inventors: Bernard Arambepola, Shaul Shulman, Naor Goldman, Amos Klimker, Noam Tal
  • Publication number: 20130272357
    Abstract: Some demonstrative embodiments include devices, systems and methods of transferring information between elements of a communication device. For example, a device may include a front-end to receive an analog downstream input including a plurality of downstream data channels, and to provide a digital serial downstream output including at least one continuous stream of constant-size downstream frames including a plurality of constant-size downstream data frames, which include downstream sample data of the plurality of downstream data channels; a serial interface including at least one serial lane to transfer the at least on stream of the digital serial downstream output; and a processor to receive the digital serial downstream over the serial interface, and to process the downstream data frames.
    Type: Application
    Filed: March 28, 2012
    Publication date: October 17, 2013
    Inventors: Shaul Shulman, Dmitrii A. Loukianov, Naor Goldman, Bernard Arambepola