Patents by Inventor Shaun Cunningham

Shaun Cunningham has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060284282
    Abstract: A manufacturing method and structure for a MIS Heterojunction Bipolar Transistor (HBT) is provided including a GaAs substrate which has a collector region; a base layer coupled to the collector region; the ultra-thin insulating layer including a rare earth oxide coupled to the base layer; and an emitter structure including metal layers coupled to the ultra-thin insulating layer.
    Type: Application
    Filed: September 2, 2004
    Publication date: December 21, 2006
    Applicant: EpiTactix Pty Ltd
    Inventor: Shaun Cunningham
  • Publication number: 20060035438
    Abstract: A method of manufacturing bonded substrates. The method includes providing a metallic substrate. The metal substrate has a predetermined thickness. The method also includes bonding a first thickness of compound semiconductor material overlying the metallic substrate and reducing a thickness of the first thickness of compound semiconductor material to a second thickness. The method includes forming one or more via structures through a portion of the second thickness of compound semiconductor material to a portion of the underlying metal substrate, whereupon the via structure electrically connects to the metal substrate.
    Type: Application
    Filed: August 11, 2005
    Publication date: February 16, 2006
    Applicants: EpiTactix Pty Ltd., CSIRO Telecommunications and Industrial Physics
    Inventor: Shaun Cunningham
  • Publication number: 20050255672
    Abstract: A semiconductor wafer composite is used as a basis for fabricating semiconductor chips, especially compound semiconductor devices. The semiconductor wafer composite advantageously comprises a metallic substrate 210 and multiple semiconductor tiles 220 bonded to the surface of the metallic substrate 210. The semiconductor wafer composite is effectively used as a single large semiconductor wafer for volume fabrication, and can be used to fabricate semiconductor devices in a similar manner.
    Type: Application
    Filed: July 19, 2005
    Publication date: November 17, 2005
    Applicant: Commonwealth Scientific and Industrial Research Organization
    Inventor: Shaun Cunningham
  • Publication number: 20050160972
    Abstract: A semiconductor wafer composite is used as a basis for fabricating semiconductor chips, especially compound semiconductor devices. The semiconductor wafer composite advantageously comprises a metallic substrate 210 and multiple semiconductor tiles 220 bonded to the surface of the metallic substrate 210. The semiconductor wafer composite is effectively used as a single large semiconductor wafer for volume fabrication, and can be used to fabricate semiconductor devices in a similar manner.
    Type: Application
    Filed: February 2, 2005
    Publication date: July 28, 2005
    Applicant: Commonwealth Scientific and Industrial Research Organization
    Inventor: Shaun Cunningham