Patents by Inventor Shaun Lytollis
Shaun Lytollis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 11265011Abstract: Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).Type: GrantFiled: March 24, 2020Date of Patent: March 1, 2022Assignee: Marvell Asia Pte, Ltd.Inventors: Andre Szczepanek, Arash Farhoodfar, Sudeep Bhoja, Sean Batty, Shaun Lytollis
-
Patent number: 10944620Abstract: The present invention is directed to data communication. In certain embodiments, the present invention provides switching mechanism for choosing between redundant communication links. Data received from a first set of communication links are processed to have alignment markers removed, and first figure of merit value is determined based on the data without alignment markers. Similarly, a second figure of merit value is determined for the data received from the second set of communication links. A switch selects between the first set of communication links and the second set of communication links based on their respective figure of merit values. Alignment markers are inserted into the data transmitted through the selected set of data links. There are other embodiments as well.Type: GrantFiled: July 15, 2020Date of Patent: March 9, 2021Assignee: INPHI CORPORATIONInventors: Arash Farhoodfar, Jitendra Swarnkar, Michael Duckering, Andre Sczapanek, Scott Feller, Shaun Lytollis
-
Publication number: 20200351144Abstract: The present invention is directed to data communication. In certain embodiments, the present invention provides switching mechanism for choosing between redundant communication links. Data received from a first set of communication links are processed to have alignment markers removed, and first figure of merit value is determined based on the data without alignment markers. Similarly, a second figure of merit value is determined for the data received from the second set of communication links. A switch selects between the first set of communication links and the second set of communication links based on their respective figure of merit values. Alignment markers are inserted into the data transmitted through the selected set of data links. There are other embodiments as well.Type: ApplicationFiled: July 15, 2020Publication date: November 5, 2020Inventors: Arash FARHOODFAR, Jitendra SWARNKAR, Michael DUCKERING, Andre SCZAPANEK, Scott FELLER, Shaun LYTOLLIS
-
Patent number: 10749732Abstract: The present invention is directed to data communication. In certain embodiments, the present invention provides switching mechanism for choosing between redundant communication links. Data received from a first set of communication links are processed to have alignment markers removed, and first figure of merit value is determined based on the data without alignment markers. Similarly, a second figure of merit value is determined for the data received from the second set of communication links. A switch selects between the first set of communication links and the second set of communication links based on their respective figure of merit values. Alignment markers are inserted into the data transmitted through the selected set of data links. There are other embodiments as well.Type: GrantFiled: January 28, 2020Date of Patent: August 18, 2020Assignee: INPHI CORPORATIONInventors: Arash Farhoodfar, Jitendra Swarnkar, Michael Duckering, Andre Sczapanek, Scott Feller, Shaun Lytollis
-
Publication number: 20200228139Abstract: Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).Type: ApplicationFiled: March 24, 2020Publication date: July 16, 2020Inventors: Andre SZCZEPANEK, Arash FARHOODFAR, Sudeep BHOJA, Sean BATTY, Shaun LYTOLLIS
-
Publication number: 20200169448Abstract: The present invention is directed to data communication. In certain embodiments, the present invention provides switching mechanism for choosing between redundant communication links. Data received from a first set of communication links are processed to have alignment markers removed, and first figure of merit value is determined based on the data without alignment markers. Similarly, a second figure of merit value is determined for the data received from the second set of communication links. A switch selects between the first set of communication links and the second set of communication links based on their respective figure of merit values. Alignment markers are inserted into the data transmitted through the selected set of data links. There are other embodiments as well.Type: ApplicationFiled: January 28, 2020Publication date: May 28, 2020Inventors: Arash FARHOODFAR, Jitendra SWARNKAR, Michael DUCKERING, Andre SCZAPANEK, Scott FELLER, Shaun LYTOLLIS
-
Patent number: 10637501Abstract: Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).Type: GrantFiled: January 30, 2019Date of Patent: April 28, 2020Assignee: INPHI CORPORATIONInventors: Andre Szczepanek, Arash Farhoodfar, Sudeep Bhoja, Sean Batty, Shaun Lytollis
-
Patent number: 10587452Abstract: The present invention is directed to data communication. In certain embodiments, the present invention provides switching mechanism for choosing between redundant communication links. Data received from a first set of communication links are processed to have alignment markers removed, and first figure of merit value is determined based on the data without alignment markers. Similarly, a second figure of merit value is determined for the data received from the second set of communication links. A switch selects between the first set of communication links and the second set of communication links based on their respective figure of merit values. Alignment markers are inserted into the data transmitted through the selected set of data links. There are other embodiments as well.Type: GrantFiled: December 26, 2018Date of Patent: March 10, 2020Assignee: INPHI CORPORATIONInventors: Arash Farhoodfar, Jitendra Swarnkar, Michael Duckering, Andre Sczapanek, Scott Feller, Shaun Lytollis
-
Publication number: 20190165806Abstract: Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).Type: ApplicationFiled: January 30, 2019Publication date: May 30, 2019Inventors: Andre SZCZEPANEK, Arash FARHOODFAR, Sudeep BHOJA, Sean BATTY, Shaun LYTOLLIS
-
Publication number: 20190132185Abstract: The present invention is directed to data communication. In certain embodiments, the present invention provides switching mechanism for choosing between redundant communication links. Data received from a first set of communication links are processed to have alignment markers removed, and first figure of merit value is determined based on the data without alignment markers. Similarly, a second figure of merit value is determined for the data received from the second set of communication links. A switch selects between the first set of communication links and the second set of communication links based on their respective figure of merit values. Alignment markers are inserted into the data transmitted through the selected set of data links. There are other embodiments as well.Type: ApplicationFiled: December 26, 2018Publication date: May 2, 2019Inventors: Arash FARHOODFAR, Jitendra SWARNKAR, Michael DUCKERING, Andre SCZAPANEK, Scott FELLER, Shaun LYTOLLIS
-
Patent number: 10236907Abstract: Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).Type: GrantFiled: May 16, 2018Date of Patent: March 19, 2019Assignee: INPHI CORPORATIONInventors: Andre Szczepanek, Arash Farhoodfar, Sudeep Bhoja, Sean Batty, Shaun Lytollis
-
Publication number: 20190052513Abstract: The present invention is directed to data communication. In certain embodiments, the present invention provides switching mechanism for choosing between redundant communication links. Data received from a first set of communication links are processed to have alignment markers removed, and first figure of merit value is determined based on the data without alignment markers. Similarly, a second figure of merit value is determined for the data received from the second set of communication links. A switch selects between the first set of communication links and the second set of communication links based on their respective figure of merit values. Alignment markers are inserted into the data transmitted through the selected set of data links. There are other embodiments as well.Type: ApplicationFiled: May 23, 2018Publication date: February 14, 2019Inventors: Arash FARHOODFAR, Jitendra SWARNKAR, Michael DUCKERING, Andre SCZAPANEK, Scott FELLER, Shaun LYTOLLIS
-
Patent number: 10205625Abstract: The present invention is directed to data communication. In certain embodiments, the present invention provides switching mechanism for choosing between redundant communication links. Data received from a first set of communication links are processed to have alignment markers removed, and first figure of merit value is determined based on the data without alignment markers. Similarly, a second figure of merit value is determined for the data received from the second set of communication links. A switch selects between the first set of communication links and the second set of communication links based on their respective figure of merit values. Alignment markers are inserted into the data transmitted through the selected set of data links. There are other embodiments as well.Type: GrantFiled: May 23, 2018Date of Patent: February 12, 2019Assignee: INPHI CORPORATIONInventors: Arash Farhoodfar, Jitendra Swarnkar, Michael Duckering, Andre Sczapanek, Scott Feller, Shaun Lytollis
-
Publication number: 20180262209Abstract: Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).Type: ApplicationFiled: May 16, 2018Publication date: September 13, 2018Inventors: Andre SZCZEPANEK, Arash FARHOODFAR, Sudeep BHOJA, Sean BATTY, Shaun LYTOLLIS
-
Patent number: 10009214Abstract: The present invention is directed to data communication. In certain embodiments, the present invention provides switching mechanism for choosing between redundant communication links. Data received from a first set of communication links are processed to have alignment markers removed, and first figure of merit value is determined based on the data without alignment markers. Similarly, a second figure of merit value is determined for the data received from the second set of communication links. A switch selects between the first set of communication links and the second set of communication links based on their respective figure of merit values. Alignment markers are inserted into the data transmitted through the selected set of data links. There are other embodiments as well.Type: GrantFiled: August 9, 2017Date of Patent: June 26, 2018Assignee: INPHI CORPORATIONInventors: Arash Farhoodfar, Jitendra Swarnkar, Michael Duckering, Andre Sczapanek, Scott Feller, Shaun Lytollis
-
Patent number: 9998146Abstract: Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).Type: GrantFiled: October 28, 2016Date of Patent: June 12, 2018Assignee: INPHI CORPORATIONInventors: Andre Szczepanek, Arash Farhoodfar, Sudeep Bhoja, Sean Batty, Shaun Lytollis
-
Publication number: 20180123613Abstract: Embodiments relate to the emulation of the effect of Forward Error Correction (FEC) codes, e.g., GF10 Reed Solomon (RS) FEC codes, on the bit error ratio (BER) of received Pseudo-Random Binary Sequences (PRBS) patterns. In particular, embodiments group errors into RS-FEC symbols and codewords in order to determine if the errors are correctable. By emulating the error correction capabilities of FEC codes in order to determine which errors are correctable by the code, embodiments afford a more accurate representation of the post-FEC BER of RS FEC codes from links carrying PRBS patterns. This FEC code emulation provides error correction statistics, for stand-alone use or for error correction in connection with Bit Error Rate Testers (BERTs).Type: ApplicationFiled: October 28, 2016Publication date: May 3, 2018Inventors: Andre SZCZEPANEK, Arash FARHOODFAR, Sudeep BHOJA, Sean BATTY, Shaun LYTOLLIS
-
Patent number: 7580492Abstract: Clock recovery apparatus having an early/late voter for deciding whether a current sampling point needs to be advanced or retarded, wherein the early/late voter passes and Up/Down signal to an interpolator for maintaining a clock signal; a frequency accumulator and rate multiplier 30 for generating further signals which are summed with those of the Up/Down signal of the early/late voter to provide an improved control signal to the phase interpolator. The accumulator is responsive to frequency changes in the input signal, and the interpolator acts on said Up/Down signals to adjust the clock signal by stepping it forward or backward according to control need, so that the sampling point can be advanced or retarded.Type: GrantFiled: June 13, 2005Date of Patent: August 25, 2009Assignee: Texas Instruments IncorporatedInventors: Andrew Pickering, Simon Forey, Robert Simpson, Shaun Lytollis
-
Publication number: 20080212718Abstract: A multi-rate tracking circuit with an input for a signal, an output arranged to indicate a current proposed level related to the signal, and voting logic connected to the input, arranged to indicate of a direction of change in the current proposed level. A first counter is connected to the voting logic, and arranged to vary the current proposed level based on the indications received from the voting logic. A second counter is arranged to vary a value based on the indications from the voting logic. The variation of the current proposed level by the first counter is dependent on the value varied by the second counter.Type: ApplicationFiled: February 8, 2008Publication date: September 4, 2008Inventor: Shaun Lytollis
-
Publication number: 20080195363Abstract: An analogue signal modelling routine for a hardware description language, wherein an output providing an analogue signal is represented by a value stored in an output variable, an input accepting the analogue signal is represented by a value stored in an input variable, and the routine is arranged to update the value stored in the input variable when the value stored on the output value is changed. The level of an analogue signal can be represented using a floating point number.Type: ApplicationFiled: February 8, 2008Publication date: August 14, 2008Inventor: Shaun Lytollis