Patents by Inventor Shawn Ferrell

Shawn Ferrell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110116212
    Abstract: Disclosed is a method of installing a passive electrical element, or voltage control guard (VCG), in an electrical circuit of a circuit breaker box in an electrical network of a residential, industrial, or commercial facility. The VCG has an inherent capacitance, resistance, and inductance and has at least two electrical leads that are installed to establish a parallel connection on a neutral bus bar in the circuit breaker box, with a portion of a current on neutral bus bar flowing through the VCG. When the VCG is properly installed, the VCG converts wasted or lost power in the electrical network to useable power, thereby reducing the total electrical consumption of the facility.
    Type: Application
    Filed: October 29, 2010
    Publication date: May 19, 2011
    Inventors: Timothy A. Rosemore, James Owings, Shawn Ferrell
  • Patent number: 6952795
    Abstract: A control module (100) includes a first signal processing unit (102) that is coupled to a second signal processing unit (114) by a control bus (130), an address bus (131) and a data bus (132). The control module conveys seed value addresses (108) and expected result addresses (110) over the address bus, seed values (118) and verification set output values (107) over the data bus, and compares each verification set output value to an expected result (120), thereby allowing the control module to determine whether the first signal processing unit, the control bus, the address bus, and the data bus are collectively functioning correctly. By properly selecting the seed value addresses, expected result addresses, seed values, and expected results (and correspondingly, verification set output values), proper operation of each line of the address bus and control bus may be individually verified.
    Type: Grant
    Filed: October 24, 2001
    Date of Patent: October 4, 2005
    Assignee: Motorola, Inc.
    Inventors: Patrick A. O'Gorman, Shawn Ferrell, Tim Grai
  • Publication number: 20030061548
    Abstract: A control module (100) includes a first signal processing unit (102) that is coupled to a second signal processing unit (114) by a control bus (130), an address bus (131) and a data bus (132). The control module conveys seed value addresses (108) and expected result addresses (110) over the address bus, seed values (118) and verification set output values (107) over the data bus, and compares each verification set output value to an expected result (120), thereby allowing the control module to determine whether the first signal processing unit, the control bus, the address bus, and the data bus are collectively functioning correctly. By properly selecting the seed value addresses, expected result addresses, seed values, and expected results (and correspondingly, verification set output values), proper operation of each line of the address bus and control bus may be individually verified.
    Type: Application
    Filed: October 24, 2001
    Publication date: March 27, 2003
    Inventors: Patrick A. O'Gorman, Shawn Ferrell, Tim Grai