Abstract: A method and apparatus for system control of a central processing unit (CPU) maximum power detector are provided. in accordance with at least one embodiment, a decision is made as to whether a response of a maximum power detector of the CPU is to be altered. When the response is to be altered, a modified input level is provided to the maximum power detector to alter the response. As an example, the modified input level can prevent the maximum power detector from triggering a power throttling function. When the response is not to be altered, an existing input level for the maximum power detector is maintained. In accordance with at least one embodiment, an apparatus or information handling system can comprise a voltage regulator (VR), a current sensor, a CPU comprising a maximum power detector, and a digital to analog converter (DAC).

Abstract: A method comprises signing boot code with a public/private cryptographic key pair, and writing to storage the boot code, the public cryptographic key, and the signed boot code.

Abstract: Systems and methods are provided for supporting use of non-volatile memory (NVM) on a double data rate (DDR) memory channel for an information handling system so that non-volatile memory devices (e.g., such as Phase Change Memory “PCM” devices) may be employed for main memory usage. In one possible implementation, information handling system memory reads may be managed directly in hardware as memory semantics via use code, while memory writes may be separately handled, e.g., via an operating system (OS)/driver. In another possible implementation, both DRAM-based and NVM-based memory systems may be populated for an information handling system.

Abstract: Power resource allocation at a chassis that supports plural server information handling systems is enhanced with modifications to power consumption by plural cooling fans based upon available power resources. As available power decreases, at least some of the cooling fans operate at reduced speeds for a given thermal condition to consume less power. In one embodiment, a maximum allowed cooling fan speed is set with a delta value over the fan speed of one or more other cooling fans, such as a delta over the lowest commanded cooling fan speed of the chassis.

Abstract: Systems and methods are provided for supporting use of non-volatile memory (NVM) on a double data rate (DDR) memory channel for an information handling system so that non-volatile memory devices (e.g., such as Phase Change Memory “PCM” devices) may be employed for main memory usage. In one possible implementation, information handling system memory reads may be managed directly in hardware as memory semantics via use code, while memory writes may be separately handled, e.g., via an operating system (OS)/driver. In another possible implementation, both DRAM-based and NVM-based memory systems may be populated for an information handling system.

Abstract: Near Field Communication (NFC) supports server information handling system management through communication between a mobile information handling system and a baseboard management controller. Enhanced transfer by NFC of management information is provided by manipulating the NFC tag memory assigned for information transfer with the aid of a microcontroller coordinating NFC transfers at the baseboard management controller, such as with coordinated storage operations at a tag memory an supporting processors/microcontrollers. The microcontroller manages tag memory and/or system memory so that the portable information handling system writes and reads information beyond the capabilities of unaided tag memory.

Abstract: A remote component controller of a server rack includes a real time clock information unit to maintain real clock time and to respond to requests for real time clock information, and a communication module to receive over a communication link a request from a processing node of the server rack for real time clock information, to forward the request to the real time clock information unit, to receive from the real time clock information unit a response to the request, and to transmit the response to the request to the processing node over the communication link.

Abstract: An information handling system includes a system processor including a first Universal Serial Bus (USB) host interface, a service processor including a second USB host interface and a USB device interface, and a USB socket. The service processor couples a first USB device that is plugged into the USB socket to the first USB host interface, couples a second USB device that is plugged into the USB socket to the second USB host interface, and couples a third USB device that is plugged into the USB socket to the USB device interface.

Abstract: An information handling system includes a plurality of processors that each includes a cache memory, and a receive side scaling (RSS) indirection table with a plurality of pointers that each points to one of the processors. A network data packet received by the information handling system determines a pointer to a first processor. In response to determining the pointer, information associated with the network data packet is transferred to the cache memory of the first processor. The information handling system also includes a process scheduler that moves a process associated with the network data packet from a second processor to the first processor, and an RSS module that directs the process scheduler to move the process and associates the first pointer with the processor in response to directing the process scheduler.

Abstract: An information handling system includes a plurality of processors that each includes a cache memory, and a receive side scaling (RSS) indirection table with a plurality of pointers that each points to one of the processors. A network data packet received by the information handling system determines a pointer to a first processor. In response to determining the pointer, information associated with the network data packet is transferred to the cache memory of the first processor, The information handling system also includes a process scheduler that moves a process associated with the network data packet from a second processor to the first processor, and an RSS module that directs the process scheduler to move the process and associates the first pointer with the processor in response to directing the process scheduler.

Abstract: An information handling system (IHS) includes a plurality of processors that include a cache memory, and a receive side scaling (RSS) indirection table with a plurality of pointers each pointing to a processor. A network data packet received by the IHS determines a pointer to a first processor. In response, information associated with the network data packet is transferred to the cache memory of the first processor, The IHS also includes a process scheduler that moves a process associated with the network data packet from a second processor to the first processor, and RSS module that directs the process scheduler to move the process and associates the first pointer with the processor in response to directing the process scheduler. In one embodiment, the processes are virtual machines so that network packets associated with a virtual machine are processed by sending an interrupt to a processor supporting executing the virtual machine.

Abstract: An information handling system includes a plurality of processors that each includes a cache memory, and a receive side scaling (RSS) indirection table with a plurality of pointers that each points to one of the processors. A network data packet received by the information handling system determines a pointer to a first processor. In response to determining the pointer, information associated with the network data packet is transferred to the cache memory of the first processor, The information handling system also includes a process scheduler that moves a process associated with the network data packet from a second processor to the first processor, and an RSS module that directs the process scheduler to move the process and associates the first pointer with the processor in response to directing the process scheduler.

Abstract: Power resource allocation at a chassis that supports plural server information handling systems is enhanced with modifications to power consumption by plural cooling fans based upon available power resources. As available power decreases, at least some of the cooling fans operate at reduced speeds for a given thermal condition to consume less power. In one embodiment, a maximum allowed cooling fan speed is set with a delta value over the fan speed of one or more other cooling fans, such as a delta over the lowest commanded cooling fan speed of the chassis.

Abstract: An information handling system includes a management controller and a router. The management controller includes a universal serial bus hub and first and second devices. The management controller to assign the first device to a first server node, to assign the second device to a second server node, and to create a routing table associated with the assignment of the first and second devices respectively to the first and second server nodes. The router is in communication with the management controller. The router to receive the routing table from the management controller, to receive data from the first server node, and to route the data to the first device based on the routing table. The universal serial bus hub communicates with the router via a single physical port of the management controller.

Abstract: Systems and methods are provided for supporting use of non-volatile memory (NVM) on a double data rate (DDR) memory channel for an information handling system so that non-volatile memory devices (e.g., such as Phase Change Memory “PCM” devices) may be employed for main memory usage. In one possible implementation, information handling system memory reads may be managed directly in hardware as memory semantics via use code, while memory writes may be separately handled, e.g., via an operating system (OS)/driver. In another possible implementation, both DRAM-based and NVM-based memory systems may be populated for an information handling system.

Abstract: A method comprises signing boot code with a public/private cryptographic key pair, and writing to storage the boot code, the public cryptographic key, and the signed boot code.

Abstract: A network interface controller includes a plurality of host interfaces configured to communicate with a plurality of processing nodes, a plurality of network interfaces configured to provide network communication for the processing nodes to a network, and a shared resource configured to provide link based services and stateless offload services for the processing nodes when communicating with the network.

Abstract: A system includes first and second processing nodes and a network switch coupled to the first and second processing nodes via respective first and second interfaces. The network switch includes a management controller coupled to the interfaces to provide management functions to the processing nodes, first and second network interfaces coupled respectively to the first and second interfaces to provide network access for the processing nodes, a message passing interface between the first processing node and the second processing node, a storage interface coupled to the first and second interfaces to provide a storage capacity to the processing nodes, and a remote component controller coupled to the interfaces.

Abstract: A processing node of a server rack includes a processor to generate processing node management requests and to process responses to the node management requests, and a communication module to receive the processing node management requests, to transmit over a communication link to a management controller of the server rack external to the processing node a processing node management request, to receive over the communication link from the management controller processing node management information, and to transmit the processing node management information to the processor.

Abstract: A remote component controller of a server rack includes a real time clock information unit to maintain real clock time and to respond to requests for real time clock information, and a communication module to receive over a communication link a request from a processing node of the server rack for real time clock information, to forward the request to the real time clock information unit, to receive from the real time clock information unit a response to the request, and to transmit the response to the request to the processing node over the communication link.