Patents by Inventor Shawn Marie Collier Hernandez

Shawn Marie Collier Hernandez has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7737703
    Abstract: Built-in electrical test structures are measured for lead-to-lead shorting during the fabrication of MR elements on a wafer. The test structures are fabricated in the same fashion as the MR elements, however, the active sensor region or track width is omitted from the test structures. Thus, the left and right leads for each test structure are electrically isolated from each other in their “track width” region. If there is lead-to-lead shorting on a test structure, then the left and right leads are electrically connected in the track width region. A simple resistance measurement between the left and right leads determines the extent of any lead shorting by giving a quantitative resistance value.
    Type: Grant
    Filed: August 22, 2007
    Date of Patent: June 15, 2010
    Assignee: Hitachi Global Storage Technologies Netherlands B.V.
    Inventors: Arley Cleveland Marley, Shawn Marie Collier Hernandez
  • Patent number: 7282376
    Abstract: Built-in electrical test structures are measured for lead-to-lead shorting during the fabrication of MR elements on a wafer. The test structures are fabricated in the same fashion as the MR elements, however, the active sensor region or track width is omitted from the test structures. Thus, the left and right leads for each test structure are electrically isolated from each other in their “track width” region. If there is lead-to-lead shorting on a test structure, then the left and right leads are electrically connected in the track width region. A simple resistance measurement between the left and right leads determines the extent of any lead shorting by giving a quantitative resistance value.
    Type: Grant
    Filed: October 28, 2004
    Date of Patent: October 16, 2007
    Assignee: Hitachi Global Storage Technologies Netherlands BV
    Inventors: Arley Cleveland Marley, Shawn Marie Collier Hernandez
  • Patent number: 7270758
    Abstract: A method is presented for fabricating a read head having a read head sensor and a hard bias/lead layer which includes depositing a strip of sensor material in a sensor material region, and depositing strips of fast-milling dielectric material in first and second fast-milling dielectric material regions adjacent to the sensor material region. A protective layer and a layer of masking material is deposited on the strip of sensor material and the strips of fast-milling dielectric material to provide masked areas and exposed areas. A shaping source, such as an ion milling source, is provided which shapes the exposed areas. Hard bias/lead material is then deposited on the regions of sensor material and fast-milling dielectric material to form first and second leads and a cap on each of these regions. The cap of hard bias/lead material and the masking material is then removed from each of these regions.
    Type: Grant
    Filed: March 15, 2005
    Date of Patent: September 18, 2007
    Assignee: Hitachi Global Storage Technologies Netherlands, B.V.
    Inventors: Shawn Marie Collier Hernandez, Wipul Pemsiri Jayasekara, Timothy J. Minvielle, Benjamin Lu chen Wang, Howard Gordon Zolla