Patents by Inventor Shawn Martin O'Connor

Shawn Martin O'Connor has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Semiconductor device packages with high angle wire bonding and non-gold bond wires
    Patent number: 11848297
    Abstract: In a described example, an apparatus includes: a package substrate having a die mount portion and lead portions spaced from the die mount portion; a semiconductor die over the die mount portion having bond pads on an active surface facing away from the package substrate; non-gold bond wires forming electrical connections between at least one of the bond pads and one of the lead portions of the package substrate; a bond stitch on bump connection formed between one of the non-gold bond wires and a bond pad of the semiconductor die, comprising a stitch bond formed on a flex stud bump; and dielectric material covering a portion of the package substrate, the semiconductor die, the non-gold bond wires, the stitch bond and the flex stud bump, forming a packaged semiconductor device.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: December 19, 2023
    Assignee: Texas Instruments Incorporated
    Inventors: Bo-Hsun Pan, Chien-Chang Li, Hung-Yu Chou, Shawn Martin O'Connor, Byron Lovell Williams, Jeffrey Alan West, Zi-Xian Zhan, Sheng-Wen Huang
  • SEMICONDUCTOR DEVICE PACKAGES WITH HIGH ANGLE WIRE BONDING AND NON-GOLD BOND WIRES
    Publication number: 20230005874
    Abstract: In a described example, an apparatus includes: a package substrate having a die mount portion and lead portions spaced from the die mount portion; a semiconductor die over the die mount portion having bond pads on an active surface facing away from the package substrate; non-gold bond wires forming electrical connections between at least one of the bond pads and one of the lead portions of the package substrate; a bond stitch on bump connection formed between one of the non-gold bond wires and a bond pad of the semiconductor die, comprising a stitch bond formed on a flex stud bump; and dielectric material covering a portion of the package substrate, the semiconductor die, the non-gold bond wires, the stitch bond and the flex stud bump, forming a packaged semiconductor device.
    Type: Application
    Filed: June 30, 2021
    Publication date: January 5, 2023
    Inventors: Bo-Hsun Pan, Chien-Chang Li, Hung-Yu Chou, Shawn Martin O'Connor, Byron Lovell Williams, Jeffrey Alan West, Zi-Xian Zhan, Sheng-Wen Huang
  • Partial Solder Mask Defined Pad Design
    Publication number: 20080093749
    Abstract: A solder ball pad that includes a substrate and a bonding pad attached to the substrate. The bonding pad has a bonding pad surface and a bonding pad edge. The solder ball pad also includes a solder mask attached to the substrate in which the solder mask at least partially surrounds, but does not substantially cover, the bonding pad. The solder ball pad also has an anchor pad coupled to the bonding pad and extending between the substrate and the solder mask.
    Type: Application
    Filed: October 20, 2006
    Publication date: April 24, 2008
    Applicant: Texas Instruments Incorporated
    Inventors: Mark Allen Gerber, Wyatt Allen Huddleston, Shawn Martin O'Connor