Patents by Inventor Shawn R. Gibb

Shawn R. Gibb has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200058491
    Abstract: In various embodiments, a semiconductor device includes an aluminum nitride single-crystal substrate, a pseudomorphic strained layer disposed thereover that comprises at least one of AN, GaN, InN, or an alloy thereof, and, disposed over the strained layer, a semiconductor layer that is lattice-mismatched to the substrate and substantially relaxed.
    Type: Application
    Filed: September 3, 2019
    Publication date: February 20, 2020
    Inventors: James R. Grandusky, Leo J. Schowalter, Shawn R. Gibb, Joseph A. Smart, Shiwen Liu
  • Patent number: 10523180
    Abstract: A method of manufacture and structure for an acoustic resonator device having a hybrid piezoelectric stack with a strained single crystal layer and a thermally-treated polycrystalline layer. The method can include forming a strained single crystal piezoelectric layer overlying the nucleation layer and having a strain condition and piezoelectric layer parameters, wherein the strain condition is modulated by nucleation growth parameters and piezoelectric layer parameters to improve one or more piezoelectric properties of the strained single crystal piezoelectric layer. Further, the method can include forming a polycrystalline piezoelectric layer overlying the strained single crystal piezoelectric layer, and performing a thermal treatment on the polycrystalline piezoelectric layer to form a recrystallized polycrystalline piezoelectric layer. The resulting device with this hybrid piezoelectric stack exhibits improved electromechanical coupling and wide bandwidth performance.
    Type: Grant
    Filed: July 13, 2018
    Date of Patent: December 31, 2019
    Assignee: Akoustis, Inc.
    Inventors: Shawn R. Gibb, Craig Moe, Jeff Leathersich, Steven Denbaars, Jeffrey B. Shealy
  • Publication number: 20190372555
    Abstract: In an array of single crystal acoustic resonators, the effective coupling coefficient of first and second strained single crystal filters are individually tailored in order to achieve desired frequency responses. In a duplexer embodiment, the effective coupling coefficient of a transmit band-pass filter is lower than the effective coupling coefficient of a receive band-pass filter of the same duplexer. The coefficients can be tailored by varying the ratio of the thickness of a piezoelectric layer to the total thickness of electrode layers or by forming a capacitor in parallel with an acoustic resonator within the filter for which the effective coupling coefficient is to be degraded. Further, a strained piezoelectric layer can be formed overlying a nucleation layer characterized by nucleation growth parameters, which can be configured to modulate a strain condition in the strained piezoelectric layer to adjust piezoelectric properties for improved performance in specific applications.
    Type: Application
    Filed: June 1, 2018
    Publication date: December 5, 2019
    Inventors: Jeffrey B. SHEALY, Shawn R. GIBB
  • Publication number: 20190371792
    Abstract: A method of manufacture and structure for a monolithic single chip single crystal device. The method can include forming a first single crystal epitaxial layer overlying the substrate and forming one or more second single crystal epitaxial layers overlying the first single crystal epitaxial layer. The first single crystal epitaxial layer and the one or more second single crystal epitaxial layers can be processed to form one or more active or passive device components. Through this process, the resulting device includes a monolithic epitaxial stack integrating multiple circuit functions.
    Type: Application
    Filed: August 5, 2019
    Publication date: December 5, 2019
    Applicant: Akoustis, Inc.
    Inventors: Shawn R. GIBB, David M. AICHELE, Ramakrishna VETURY, Mark D. BOOMGARDEN, Jeffrey B. SHEALY
  • Publication number: 20190326885
    Abstract: An RF circuit device using modified lattice, lattice, and ladder circuit topologies. The devices can include four resonator devices and four shunt resonator devices. In the ladder topology, the resonator devices are connected in series from an input port to an output port while shunt resonator devices are coupled the nodes between the resonator devices. In the lattice topology, a top and a bottom serial configurations each includes a pair of resonator devices that are coupled to differential input and output ports. A pair of shunt resonators is cross-coupled between each pair of a top serial configuration resonator and a bottom serial configuration resonator. The modified lattice topology adds baluns or inductor devices between top and bottom nodes of the top and bottom serial configurations of the lattice configuration. These topologies may be applied using single crystal or polycrystalline bulk acoustic wave (BAW) resonators.
    Type: Application
    Filed: July 5, 2019
    Publication date: October 24, 2019
    Inventors: Rohan W. HOULDEN, Jeffrey B. SHEALY, Shawn R. GIBB, David M. AICHELE
  • Patent number: 10446391
    Abstract: In various embodiments, a semiconductor device includes an aluminum nitride single-crystal substrate, a pseudomorphic strained layer disposed thereover that comprises at least one of AlN, GaN, InN, or an alloy thereof, and, disposed over the strained layer, a semiconductor layer that is lattice-mismatched to the substrate and substantially relaxed.
    Type: Grant
    Filed: November 17, 2011
    Date of Patent: October 15, 2019
    Assignee: CRYSTAL IS, INC.
    Inventors: James R. Grandusky, Leo J. Schowalter, Shawn R. Gibb, Joseph A. Smart, Shiwen Liu
  • Publication number: 20190312027
    Abstract: A method of manufacture and structure for a monolithic single chip single crystal device. The method can include forming a first single crystal epitaxial layer overlying the substrate and forming one or more second single crystal epitaxial layers overlying the first single crystal epitaxial layer. The first single crystal epitaxial layer and the one or more second single crystal epitaxial layers can be processed to form one or more active or passive device components. Through this process, the resulting device includes a monolithic epitaxial stack integrating multiple circuit functions.
    Type: Application
    Filed: January 12, 2017
    Publication date: October 10, 2019
    Inventors: Shawn R. GIBB, David AICHELE, Ramakrishna VETURY, Mark D. BOOMGARDEN, Jeffrey B. SHEALY
  • Patent number: 10431580
    Abstract: A method of manufacture and structure for a monolithic single chip single crystal device. The method can include forming a first single crystal epitaxial layer overlying the substrate and forming one or more second single crystal epitaxial layers overlying the first single crystal epitaxial layer. The first single crystal epitaxial layer and the one or more second single crystal epitaxial layers can be processed to form one or more active or passive device components. Through this process, the resulting device includes a monolithic epitaxial stack integrating multiple circuit functions.
    Type: Grant
    Filed: January 12, 2017
    Date of Patent: October 1, 2019
    Assignee: Akoustis, Inc.
    Inventors: Shawn R. Gibb, David Aichele, Ramakrishna Vetury, Mark D. Boomgarden, Jeffrey B. Shealy
  • Publication number: 20190259934
    Abstract: A method of manufacture and resulting structure for a single crystal electronic device with an enhanced strain interface region. The method of manufacture can include forming a nucleation layer overlying a substrate and forming a first and second single crystal layer overlying the nucleation layer. This first and second layers can be doped by introducing one or more impurity species to form a strained single crystal layers. The first and second strained layers can be aligned along the same crystallographic direction to form a strained single crystal bi-layer having an enhanced strain interface region. Using this enhanced single crystal bi-layer to form active or passive devices results in improved physical characteristics, such as enhanced photon velocity or improved density charges.
    Type: Application
    Filed: February 20, 2018
    Publication date: August 22, 2019
    Inventors: Shawn R. GIBB, Steven DENBAARS, Jeffrey B. SHEALY
  • Publication number: 20190214527
    Abstract: In various embodiments, light-emitting devices incorporate graded layers with compositional offsets at one or both end points of the graded layer to promote formation of two-dimensional carrier gases and polarization doping, thereby enhancing device performance.
    Type: Application
    Filed: January 4, 2019
    Publication date: July 11, 2019
    Inventors: Craig MOE, James R. GRANDUSKY, Shawn R. GIBB, Leo J. SCHOWALTER, Kosuke SATO, Tomohiro MORISHITA
  • Publication number: 20190190479
    Abstract: A method of manufacture for an acoustic resonator or filter device. In an example, the present method can include forming metal electrodes with different geometric areas and profile shapes coupled to a piezoelectric layer overlying a substrate. These metal electrodes can also be formed within cavities of the piezoelectric layer or the substrate with varying geometric areas. Combined with specific dimensional ratios and ion implantations, such techniques can increase device performance metrics. In an example, the present method can include forming various types of perimeter structures surrounding the metal electrodes, which can be on top or bottom of the piezoelectric layer. These perimeter structures can use various combinations of modifications to shape, material, and continuity. These perimeter structures can also be combined with sandbar structures, piezoelectric layer cavities, the geometric variations previously discussed to improve device performance metrics.
    Type: Application
    Filed: February 14, 2019
    Publication date: June 20, 2019
    Inventors: Ramakrishna Vetury, Alexander Y. Feldman, Michael D. Hodge, Art Geiss, Shawn R. Gibb, Mark D. Boomgarden, Michael P. Lewis, Pinal Patel, Jeffrey B. Shealy
  • Publication number: 20190181831
    Abstract: A communication system using a single crystal acoustic resonator device. The device includes a piezoelectric substrate with a piezoelectric layer formed overlying a transfer substrate. A topside metal electrode is formed overlying the substrate. A topside micro-trench is formed within the piezoelectric layer. A topside metal with a topside metal plug is formed within the topside micro-trench. First and second backside cavities are formed within the transfer substrate under the topside metal electrode. A backside metal electrode is formed under the transfer substrate, within the first backside cavity, and under the topside metal electrode. A backside metal plug is formed under the transfer substrate, within the second backside cavity, and under the topside micro-trench. The backside metal plug is connected to the topside metal plug and the backside metal electrode. The topside micro-trench, the topside metal plug, the second backside cavity, and the backside metal plug form a micro-via.
    Type: Application
    Filed: February 21, 2019
    Publication date: June 13, 2019
    Inventors: Shawn R. Gibb, Ramakrishna Vetury, Jeffrey B. Shealy, Mark D. Boomgarden, Michael P. Lewis, Alexander Y. Feldman
  • Patent number: 10256786
    Abstract: A communication system using a single crystal acoustic resonator device. The device includes a piezoelectric substrate with a piezoelectric layer formed overlying a thinned seed substrate. A topside metal electrode is formed overlying the substrate. A topside micro-trench is formed within the piezoelectric layer. A topside metal with a topside metal plug is formed within the topside micro-trench. First and second backside trenches are formed within the seed substrate under the topside metal electrode. A backside metal electrode is formed under the seed substrate, within the first backside trench, and under the topside metal electrode. A backside metal plug is formed under the seed substrate, within the second backside trench, and under the topside micro-trench. The backside metal plug is connected to the topside metal plug and the backside metal electrode. The topside micro-trench, the topside metal plug, the second backside trench, and the backside metal plug form a micro-via.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: April 9, 2019
    Assignee: Akoustis, Inc.
    Inventors: Shawn R. Gibb, Ramakrishna Vetury, Jeffrey B. Shealy, Mark D. Boomgarden, Michael P. Lewis, Alexander Y. Feldman
  • Publication number: 20190081611
    Abstract: A system for a wireless communication infrastructure using single crystal devices. The wireless system can include a controller coupled to a power source, a signal processing module, and a plurality of transceiver modules. Each of the transceiver modules includes a transmit module configured on a transmit path and a receive module configured on a receive path. The transmit modules each include at least a transmit filter having one or more filter devices, while the receive modules each include at least a receive filter. Each of these filter devices includes a single crystal acoustic resonator device with at least a first electrode material, a single crystal material, and a second electrode material. Wireless infrastructures using the present single crystal technology perform better in high power density applications, enable higher out of band rejection (OOBR), and achieve higher linearity as well.
    Type: Application
    Filed: September 11, 2017
    Publication date: March 14, 2019
    Inventors: Ramakrishna VETURY, Shawn R. GIBB, Mark D. BOOMGARDEN, Jeffrey B. SHEALY
  • Publication number: 20190068164
    Abstract: An RF circuit device using modified lattice, lattice, and ladder circuit topologies. The devices can include four resonator devices and four shunt resonator devices. In the ladder topology, the resonator devices are connected in series from an input port to an output port while shunt resonator devices are coupled the nodes between the resonator devices. In the lattice topology, a top and a bottom serial configurations each includes a pair of resonator devices that are coupled to differential input and output ports. A pair of shunt resonators is cross-coupled between each pair of a top serial configuration resonator and a bottom serial configuration resonator. The modified lattice topology adds baluns or inductor devices between top and bottom nodes of the top and bottom serial configurations of the lattice configuration. These topologies may be applied using single crystal or polycrystalline bulk acoustic wave (BAW) resonators.
    Type: Application
    Filed: October 30, 2018
    Publication date: February 28, 2019
    Inventors: Rohan W. HOULDEN, Jeffrey B. SHEALY, Shawn R. GIBB, David AICHELE
  • Patent number: 10211369
    Abstract: In various embodiments, light-emitting devices incorporate graded layers with compositional offsets at one or both end points of the graded layer to promote formation of two-dimensional carrier gases and polarization doping, thereby enhancing device performance.
    Type: Grant
    Filed: May 11, 2017
    Date of Patent: February 19, 2019
    Assignee: CRYSTAL IS, INC.
    Inventors: Craig Moe, James R. Grandusky, Shawn R. Gibb, Leo J. Schowalter, Kosuke Sato, Tomohiro Morishita
  • Patent number: 10211368
    Abstract: In various embodiments, light-emitting devices incorporate graded layers with compositional offsets at one or both end points of the graded layer to promote formation of two-dimensional carrier gases and polarization doping, thereby enhancing device performance.
    Type: Grant
    Filed: May 5, 2017
    Date of Patent: February 19, 2019
    Assignee: CRYSTAL IS, INC.
    Inventors: Craig Moe, James R. Grandusky, Shawn R. Gibb, Leo J. Schowalter, Kosuke Sato, Tomohiro Morishita
  • Publication number: 20190036504
    Abstract: A method of manufacture for an acoustic resonator or filter device. In an example, the present method can include forming metal electrodes with different geometric areas and profile shapes coupled to a piezoelectric layer overlying a substrate. These metal electrodes can also be formed within cavities of the piezoelectric layer or the substrate with varying geometric areas. Combined with specific dimensional ratios and ion implantations, such techniques can increase device performance metrics. In an example, the present method can include forming various types of perimeter structures surrounding the metal electrodes, which can be on top or bottom of the piezoelectric layer. These perimeter structures can use various combinations of modifications to shape, material, and continuity. These perimeter structures can also be combined with sandbar structures, piezoelectric layer cavities, the geometric variations previously discussed to improve device performance metrics.
    Type: Application
    Filed: September 18, 2018
    Publication date: January 31, 2019
    Inventors: Ramakrishna VETURY, Alexander Y. FELDMAN, Michael D. HODGE, Art GEISS, Shawn R. GIBB, Mark D. BOOMGARDEN, Michael P. LEWIS, Pinal PATEL, Jeffrey B. SHEALY
  • Publication number: 20190036592
    Abstract: A front end module (FEM) for a 5.2 GHz Wi-Fi acoustic wave resonator RF filter circuit. The device can include a power amplifier (PA), a 5.2 GHz resonator, and a diversity switch. The device can further include a low noise amplifier (LNA). The PA is electrically coupled to an input node and can be configured to a DC power detector or an RF power detector. The resonator can be configured between the PA and the diversity switch, or between the diversity switch and an antenna. The LNA may be configured to the diversity switch or be electrically isolated from the switch. Another 5.2 GHZ resonator may be configured between the diversity switch and the LNA. In a specific example, this device integrates a 5.2 GHz PA, a 5.2 GHZ bulk acoustic wave (BAW) RF filter, a single pole two throw (SP2T) switch, and a bypassable LNA into a single device.
    Type: Application
    Filed: September 19, 2018
    Publication date: January 31, 2019
    Inventors: Jeffrey B. SHEALY, Rohan W. HOULDEN, Shawn R. GIBB, David M. AICHELE
  • Publication number: 20190020327
    Abstract: An RF circuit device using modified lattice, lattice, and ladder circuit topologies. The devices can include four resonator devices and four shunt resonator devices. In the ladder topology, the resonator devices are connected in series from an input port to an output port while shunt resonator devices are coupled the nodes between the resonator devices. In the lattice topology, a top and a bottom serial configurations each includes a pair of resonator devices that are coupled to differential input and output ports. A pair of shunt resonators is cross-coupled between each pair of a top serial configuration resonator and a bottom serial configuration resonator. The modified lattice topology adds baluns or inductor devices between top and bottom nodes of the top and bottom serial configurations of the lattice configuration. These topologies may be applied using single crystal or polycrystalline bulk acoustic wave (BAW) resonators.
    Type: Application
    Filed: September 19, 2018
    Publication date: January 17, 2019
    Inventors: Jeffrey B. SHEALY, Rohan W. HOULDEN, Shawn R. GIBB, David M. AICHELE