Abstract: The present disclosure describes a structure with a substrate, a damping structure, and a capacitor structure. The damping structure is disposed over the substrate and includes a rigid material layer and a damping material layer disposed on the rigid material layer. The damping material layer includes a damping material with a tensile strength of about 20 MPa, a Young's modulus of about 0.5 GPa, and an elongation of about 10%. The capacitor structure is disposed over the damping structure, in which the damping structure mitigates (or eliminates) a transfer of piezoelectric and electrostrictive vibrations generated by the capacitor structure to the substrate.

Abstract: Embedded PCB (printed circuit board) is used for the packaging and assembly of a low profile power conversion system module that can be employed in space constrained environment of small computer/electronic systems. The low profile power conversion system module may include an embedded PCB, a power silicon device embedded within the PCB, a magnetic component which is either embedded within the PCB or disposed on the PCB, or input/output terminals disposed on the side of the embedded PCB. The embedded PCB and the magnetic component may be thin planar shaped to save vertical space. The low profile power conversion system module can be placed inside a cavity formed in the system PCB to save even more vertical space.

Abstract: Printed circuit boards having an increased density of vertical interconnect paths, as well as methods for their manufacture. One example may provide a printed circuit board having an increased density of vertical interconnect paths by forming a plurality of segmented vias. The segmented vias may extend through interior layers of the printed circuit board. The segmented vias may be formed of portions of vias in the interior layers of the printed circuit board. An area between three or more segmented vias may be filled with resin or other material or materials.

Abstract: Printed circuit boards having an increased density of vertical interconnect paths, as well as methods for their manufacture. One example may provide a printed circuit board having an increased density of vertical interconnect paths by forming a plurality of segmented vias. The segmented vias may extend through interior layers of the printed circuit board. The segmented vias may be formed of portions of vias in the interior layers of the printed circuit board. An area between three or more segmented vias may be filled with resin or other material or materials.

Abstract: This application relates to capacitors that resist deformation because of the configuration of their conductive and dielectric layers. The capacitors are multilayer capacitors that include multiple dielectric and conductive layers. The dielectric layers can be arranged in a way that creates a rigid barrier or dead zone, which can resist mechanical deformation when the multilayer capacitor is charged. In some embodiments, two or more multilayer capacitors are stacked together in an arrangement that causes each of the multilayer capacitors to cancel any deformations of the other when the multilayer capacitors are charged. In this way, noise exhibited by the multilayer capacitors can be reduced.

Abstract: Embedded PCB (printed circuit board) is used for the packaging and assembly of a low profile power conversion system module that can be employed in space constrained environment of small computer/electronic systems. The low profile power conversion system module may include an embedded PCB, a power silicon device embedded within the PCB, a magnetic component which is either embedded within the PCB or disposed on the PCB, or input/output terminals disposed on the side of the embedded PCB. The embedded PCB and the magnetic component may be thin planar shaped to save vertical space. The low profile power conversion system module can be placed inside a cavity formed in the system PCB to save even more vertical space.

Abstract: This application relates to multi-layered ceramic capacitors (MLCC) that can be surface mounted, include multiple terminals, and handle multiple voltages. The MLCC can include electrode and dielectric layers that are stacked in parallel to a printed circuit board (PCB) on which the MLCC can be attached. A set of primary conductive pads can be formed on the bottom of the MLCC in order to create a conductive interface between the PCB and the MLCC. Secondary conductive pads are formed on the side of the MLCC, and can extend perpendicular to the PCB. The secondary conductive pads are created by stacking internal electrode plates together and connecting them electrically and mechanically to each another. This arrangement provides for multiple voltages and electrical connections at the MLCC while reducing reverse piezoelectric and/or electro-striction noise.

Abstract: Embedded PCB (printed circuit board) is used for the packaging and assembly of a low profile power conversion system module that can be employed in space constrained environment of small computer/electronic systems. The low profile power conversion system module includes an embedded PCB, a power silicon device embedded within the PCB, a magnetic component which is either embedded within the PCB or disposed on the PCB, and input/output terminals disposed on the side of the embedded PCB. The embedded PCB and the magnetic component are thin planar shaped to save vertical space. The low profile power conversion system module can be placed inside a cavity formed in the system PCB to save even more vertical space.

Abstract: Passive component structures that may save space, are readily manufactured, and are easy to use. In one example, a passive component structure may include two capacitors, each formed as a group of plates separate and apart from the other. The two groups of plates may have a spacing layer between them.

Abstract: A routing apparatus includes a PCB having first and second arrays of contact pads, an interposer having third, fourth and fifth arrays of contact pads, the third and fourth arrays of contact pads being disposed on opposing surfaces of the interposer, the third array of contact pads being electrically connected to the first array of contact pads. First and second integrated circuits are respectively mounted on the second and fourth arrays of contact pads. The interposer includes a first group of conductive traces insulated from one another, a first array of conductive vias extending perpendicularly to the first group of conductive traces, the first array of conductive vias including through-vias connecting the third array of contact pads to corresponding contact pads in the fourth array of contact pads.

Abstract: The described embodiments relate generally to printed circuit boards (PCBs) including a capacitor and more specifically to designs for mechanically isolating the capacitor from the PCB to reduce an acoustic noise produced when the capacitor imparts a piezoelectric force on the PCB. Conductive features can be mechanically and electrically coupled to electrodes located on two ends of the capacitor. The conductive features can be placed in corners where the amplitude of vibrations created by the piezoelectric forces is relatively small. The conductive features can then be soldered to a land pattern on the PCB to form a mechanical and electrical connection while reducing an amount of vibrational energy transferred from the capacitor to the PCB.

Abstract: A circuit board includes conductive traces being sandwiched by an upper insulating layer and a lower insulating layer, a first array of conductive vias extending perpendicularly to the conductive traces, the vias in the first array of conductive vias being arranged such that any two adjacent vias in a row of vias extending along any given dimension in the first array of conductive vias are equally spaced from each other, and isolation resistors embedded within the first array of conductive vias such that each isolation resistor is disposed between at least two adjacent vias in the first array of conductive vias, each isolation resistor being disposed closer to the conductive via to which the isolation resistor is coupled than all other conductive vias surrounding the isolation resistor.

Abstract: A routing apparatus includes a PCB having first and second arrays of contact pads, an interposer having third, fourth and fifth arrays of contact pads, the third and fourth arrays of contact pads being disposed on opposing surfaces of the interposer, the third array of contact pads being electrically connected to the first array of contact pads. First and second integrated circuits are respectively mounted on the second and fourth arrays of contact pads. The interposer includes a first group of conductive traces insulated from one another, a first array of conductive vias extending perpendicularly to the first group of conductive traces, the first array of conductive vias including through-vias connecting the third array of contact pads to corresponding contact pads in the fourth array of contact pads.

Abstract: A circuit board includes conductive traces being sandwiched by an upper insulating layer and a lower insulating layer, a first array of conductive vias extending perpendicularly to the conductive traces, the vias in the first array of conductive vias being arranged such that any two adjacent vias in a row of vias extending along any given dimension in the first array of conductive vias are equally spaced from each other, and isolation resistors embedded within the first array of conductive vias such that each isolation resistor is disposed between at least two adjacent vias in the first array of conductive vias, each isolation resistor being disposed closer to the conductive via to which the isolation resistor is coupled than all other conductive vias surrounding the isolation resistor.

Abstract: This disclosure describes methods and systems for minimizing electromagnetic interference (EMI) noise emanating from a ceramic capacitor. The ceramic capacitor may include several terminations are on a bottom portion of the capacitor. The capacitor may be designed to include several capacitors formed from electrode layers. The capacitor may include a conductive coating on an outer peripheral portion. The coating may include conductive materials such as Cu, Ni, Ag, and/or graphite. Alternatively, some regions of the capacitor may include electrode layers built into the capacitor that are not associated with capacitors. In this manner, the ceramic capacitor may be free of the conductive coating to locations proximate to the described electrode layers not associated with capacitors. The conductive coating can act as an electromagnetic shielding to prevent the EMI noise from emanating outside the electromagnetic shielding. Also, the conductive coating can be electrically grounded (e.g.

Abstract: This application relates to capacitors that resist deformation because of the configuration of their conductive and dielectric layers. The capacitors are multilayer capacitors that include multiple dielectric and conductive layers. The dielectric layers can be arranged in a way that creates a rigid barrier or dead zone, which can resist mechanical deformation when the multilayer capacitor is charged. In some embodiments, two or more multilayer capacitors are stacked together in an arrangement that causes each of the multilayer capacitors to cancel any deformations of the other when the multilayer capacitors are charged. In this way, noise exhibited by the multilayer capacitors can be reduced.

Abstract: This application relates to systems, methods, and apparatuses for reducing bending stresses and tension from damaging components of a computing device. A component of the computing device can be connected to a spacer that can distribute impact forces and resist bending when an impact force is applied to the computing device. Additionally, a bracket can be connected to a circuit board of the computing device to further help distribute impact forces and resist bending. The bracket can be ring shaped and surround components connected to the circuit board to intercept impact forces from contacting the components.

Abstract: A printed circuit board may have embedded strain gauges. A strain gauge may be formed from a metal trace on a polymer substrate. The metal trace may form a variable strain gauge resistor that is incorporated into a bridge circuit for a strain gauge. The printed circuit may have a rigid printed circuit layer with a recess that receives the polymer substrate. Metal pads on the polymer substrate may be coupled to respective ends of the variable strain gauge resistor. The rigid printed circuit substrate with the recess may be laminated between additional rigid printed circuit layers. Vias may be formed through the additional rigid printed circuit layers to contact the metal pads. Embedded strain gauges may be used in gathering strain data when strain is imparted to a printed circuit during use of the printed circuit in an electronic device or during testing.

Abstract: A printed circuit board may have embedded strain gauges. A strain gauge may be formed from a metal trace on a polymer substrate. The metal trace may form a variable strain gauge resistor that is incorporated into a bridge circuit for a strain gauge. The printed circuit may have a rigid printed circuit layer with a recess that receives the polymer substrate. Metal pads on the polymer substrate may be coupled to respective ends of the variable strain gauge resistor. The rigid printed circuit substrate with the recess may be laminated between additional rigid printed circuit layers. Vias may be formed through the additional rigid printed circuit layers to contact the metal pads. Embedded strain gauges may be used in gathering strain data when strain is imparted to a printed circuit during use of the printed circuit in an electronic device or during testing.

Abstract: Various methods for forming a low profile assembly are described. The low profile assembly may include an integrated circuit. The integrated circuit as well as components associated with the integrated circuit may be positioned below a surface plane of a printed circuit board in which the integrated circuit is located. The integrated circuit may include bond wires configured to electrically connect the integrated circuits to other components. The low profile assembly may include forming various layers over a substrate and later removing some of the layers.