Patents by Inventor Shay-Ping Wang

Shay-Ping Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070202833
    Abstract: A mobile terminal having one or more of the following modes: a standby mode, talk mode, send/receive mode, and read/write mode, includes a cell array being capable of providing a cell array power and a backup battery being capable of providing battery power. The mobile terminal has a power management system that when the mobile terminal enters standby mode and/or read/write mode, has the ability to supply the mobile terminal with only cell array power. The power management system further has, when the mobile terminal enters talk mode and/or send/receive mode, the ability to supply the mobile terminal with battery power and/or cell array power. In both events, the power management system has the ability to send any excess cell array power to recharge the battery.
    Type: Application
    Filed: July 24, 2006
    Publication date: August 30, 2007
    Applicant: FIRST INTERNATIONAL DIGITAL, INC.
    Inventor: Shay-Ping Wang
  • Patent number: 6023719
    Abstract: With reference to FIG. 1 signal processor (10) for performing transformations of sets of input data points comprises a memory for storing a first half input data points and a second half input data points, an adder unit for pairwise adding one real part of each one first half input data point and a second half input data point and providing adder output data, and a computing unit for performing transformations upon the adder output data. Addition for data reduction and data transformation are carried out simultaneously by different units.
    Type: Grant
    Filed: September 4, 1997
    Date of Patent: February 8, 2000
    Assignee: Motorola, Inc.
    Inventors: Itzhak Barak, Yaron Ben-Arie, Effi Orian, Shao Wei Pan, Shay Ping Wang
  • Patent number: 5968112
    Abstract: Parallel signal processor (10) (FIG. 2) performs a Fourier Transformation of an input signal; The transformation coefficients are converted once to logarithmic form and stored in a cache memory. The input data is converted serially to logarithmic form, and fed to all processing units in parallel. The processing units compute their respective products as additions in the logarithmic domain. Then, the products are converted back to the normal domain. The products with the correct sign are summed by an accumulator of the respective processing element. After the last signal data point has run through the processing elements and the last products are added to their respective sums, all complex output signal data points are complete simultaneously.
    Type: Grant
    Filed: September 4, 1997
    Date of Patent: October 19, 1999
    Assignee: Motorola,Inc.
    Inventors: Jacob Kirschenbaum, Itzhak Barak, Yaron Ben-Arie, Yacov Efrat, Effi Orian, Shao Wei Pan, Shay Ping Wang
  • Patent number: 5455890
    Abstract: Neural networks learn expert system rules, for either business or real-time applications, to improve the robustness and speed of execution of the expert system. One or more neural networks are constructed which incorporate the production rules of one or more expert systems. Each neural network is constructed of neurons or neuron circuits each having only one significant processing element in the form of a multiplier. Each neural network utilizes a training algorithm which does not require repetitive training and which yields a global minimum to each given set of input vectors.
    Type: Grant
    Filed: September 30, 1993
    Date of Patent: October 3, 1995
    Assignee: Motorola, Inc.
    Inventor: Shay-Ping Wang
  • Patent number: 5450527
    Abstract: A technique for converting an existing expert system into one incorporating one or more neural networks includes the steps of separating the knowledge base and inference engine of the existing expert system, identifying the external and internal inputs and outputs, identifying subsystems from the inputs and outputs, using a neural network for each subsystem, training each neural network to learn the production rules of its associated subsystem, and computing exact or interpolated outputs from a given set of inputs. Each neural network utilizes a training algorithm which does not require repetitive training and which yields a global minimum to each given set of inputs.
    Type: Grant
    Filed: September 30, 1993
    Date of Patent: September 12, 1995
    Assignee: Motorola, Inc.
    Inventor: Shay-Ping Wang
  • Patent number: 5371408
    Abstract: An integrated circuit package with a removable shield is disclosed. An integrated circuit having a plurality of interface leads is mounted on a TAB carrier. A removable shield fabricated from a spring material is clipped to the TAB carrier. A limited opening through the removable shield allows a predetermined access to the integrated circuit.
    Type: Grant
    Filed: November 29, 1991
    Date of Patent: December 6, 1994
    Assignee: Motorola, Inc.
    Inventors: Walter L. Moulton, Paul A. Ogden, Shay-Ping Wang