Abstract: One or more embodiments relate to a multi-phase voltage regulator with AVP or droop configured to implement a non-linear load line. According to certain aspects, the non-linear load line can have a non-linear or zero slope in a first current/voltage region and a constant non-zero slope in second current/voltage region. In embodiments, the non-linear or zero slope region can specify that for any value of output current in that region, the output voltage will be the same predetermined value. The non-zero slope region can specify that for any value of the output current in that region, output current will be multiplied by a constant non-zero droop resistance value.

Abstract: According to certain aspects, the present embodiments are directed to techniques for providing the ability to monitor one or more operational parameters of a voltage regulator. In embodiments, the voltage regulator is a multiphase voltage regulator having a plurality of power stages corresponding to each respective phase. In these and other embodiments, the operational parameters include one or both of a phase current and a phase temperature. According to certain additional aspects, the present embodiments provide the ability to monitor the respective phase current output and phase temperature of each phase independently. According to further aspects, this ability to monitor the operational parameters is achieved while minimizing circuit complexity.

Abstract: One or more embodiments relate to a multi-phase voltage regulator with AVP or droop configured to implement a non-linear load line. According to certain aspects, the non-linear load line can have a non-linear or zero slope in a first current/voltage region and a constant non-zero slope in second current/voltage region. In embodiments, the non-linear or zero slope region can specify that for any value of output current in that region, the output voltage will be the same predetermined value. The non-zero slope region can specify that for any value of the output current in that region, output current will be multiplied by a constant non-zero droop resistance value.

Abstract: One or more embodiments relate to a multi-phase voltage regulator with AVP or droop configured to implement a non-linear load line. According to certain aspects, the non-linear load line can have a non-linear or zero slope in a first current/voltage region and a constant non-zero slope in second current/voltage region. In embodiments, the non-linear or zero slope region can specify that for any value of output current in that region, the output voltage will be the same predetermined value. The non-zero slope region can specify that for any value of the output current in that region, output current will be multiplied by a constant non-zero droop resistance value.

Abstract: According to certain aspects, the present embodiments are directed to techniques for providing the ability to monitor one or more operational parameters of a voltage regulator. In embodiments, the voltage regulator is a multiphase voltage regulator having a plurality of power stages corresponding to each respective phase. In these and other embodiments, the operational parameters include one or both of a phase current and a phase temperature. According to certain additional aspects, the present embodiments provide the ability to monitor the respective phase current output and phase temperature of each phase independently. According to further aspects, this ability to monitor the operational parameters is achieved while minimizing circuit complexity.

Abstract: A buck/boost voltage regulator generates a regulated output voltage responsive to an input voltage and a plurality of control signals. The buck/boost voltage regulator includes a plurality of switching transistors responsive to the plurality of control signals. Control circuitry monitors the regulated output voltage and generates the plurality of control signals responsive thereto. The control circuitry controls the operation of the plurality of switching transistors to enable a charging phase in a first mode of operation, a pass through phase in a second mode of operation and a discharge phase in a third mode of operation within the buck/boost voltage regulator to eliminate occurrence of a four switch switching condition.

Abstract: A multi-phase non-inverting buck boost voltage converter has a plurality of buck boost voltage regulators. Each regulator is associated with a separate phase for generating a regulated output voltage responsive to an input voltage. A plurality of current sensors are each associated with one of the plurality of buck boost voltage regulators for monitoring an input current to the associated buck boost voltage regulator and generating a current sense signal for the associated phase. A plurality of buck boost mode control circuitries are each associated with one of the buck boost regulator for controlling an associated buck boost voltage regulator using peak current mode control in a buck mode of operation and valley current mode control in boost mode of operation responsive to a common error voltage and the associated current sense signal. The plurality of buck boost mode control circuitries provides current balancing between the phases.

Abstract: A semiconductor structure such as a power converter with an integrated capacitor is provided, and comprises a semiconductor substrate, a high-side output power device over the substrate at a first location, and a low-side output power device over the substrate at a second location adjacent to the first location. A first metal layer is over the high-side output power device and electrically coupled to the high-side output power device, and a second metal layer is over the low-side output power device and electrically coupled to the low-side output power device. A dielectric layer is over a portion of the first metal layer and a portion of the second metal layer, and a top metal layer is over the dielectric layer.

Abstract: A current sense amplifier includes a high-side current sense amplifier and a low-side current sense amplifier. The high-side current sense amplifier provides a current sense voltage signal for use with a voltage regulator and generates the current sense voltage signal responsive to a first current sensed through a high-side switching transistor in a first mode when the high-side switching transistor is turned on and the low-side switching transistor is turned off. The high-side current sense amplifier generates the current sense voltage signal responsive to a second current through the low-side switching transistor in a second mode when the low-side switching transistor is turned on and the high-side switching transistor is turned off. The low-side current sense amplifier senses the second current through the low-side switching transistor and generates a current control signal to the high-side current sense amplifier in the second mode.

Abstract: A buck/boost voltage regulator generates a regulated output voltage responsive to an input voltage and a plurality of control signals. The buck/boost voltage regulator includes a plurality of switching transistors responsive to the plurality of control signals. Control circuitry monitors the regulated output voltage and generates the plurality of control signals responsive thereto. The control circuitry controls the operation of the plurality of switching transistors to enable a charging phase in a first mode of operation, a pass through phase in a second mode of operation and a discharge phase in a third mode of operation within the buck/boost voltage regulator to eliminate occurrence of a four switch switching condition.

Abstract: A power converter device comprises a substrate, a power die mounted on the substrate, and a capacitor die mounted over the power die in a stacked configuration. The capacitor die is electrically coupled to the power die. A packaging material encapsulates the power die and the capacitor die. An integrated circuit die can also be mounted to the substrate and electrically coupled to the power die to receive power signals from the power die, with the packaging material also encapsulating the integrated circuit die.

Abstract: A multi-phase non-inverting buck boost voltage converter has a plurality of buck boost voltage regulators. Each regulator is associated with a separate phase for generating a regulated output voltage responsive to an input voltage. A plurality of current sensors are each associated with one of the plurality of buck boost voltage regulators for monitoring an input current to the associated buck boost voltage regulator and generating a current sense signal for the associated phase. A plurality of buck boost mode control circuitries are each associated with one of the buck boost regulator for controlling an associated buck boost voltage regulator using peak current mode control in a buck mode of operation and valley current mode control in boost mode of operation responsive to a common error voltage and the associated current sense signal. The plurality of buck boost mode control circuitries provides current balancing between the phases.

Abstract: A buck boost voltage converter circuit has a capacitor pump circuit for boosting an input voltage in a first mode of operation when an input voltage is below a desired voltage level. A buck converter circuit provides the output voltage responsive to the boosted input voltage from the capacitor pump circuit in the first mode of operation and provides the output voltage responsive to the input voltage in a second mode of operation when the input voltage is above the desired voltage level.

Abstract: An embodiment of a controller for a power supply includes circuitry that is operable to allow the power supply to operate as follows. During a first portion of a supply period, a first current flows through a first winding of the power supply, through a second winding of the power supply, and to an output node of the power supply. And during a second portion of the supply period, a second current flows through the first winding, through a third winding of the power supply, and to the output node. Each of the first, second, and third windings may be non-electrically isolated from one or more of the other windings during one or more portions of the supply period. Furthermore, the first, second, and third windings may be magnetically coupled to one another. For example, in an embodiment, such a controller may be part of a DC-DC converter that may be more efficient, and that may have reduced interdependence between output-signal ripple and transient response, than a conventional buck converter.

Abstract: A buck boost voltage converter circuit, comprises a capacitor pump circuit for boosting an input voltage in a first mode of operation when an input voltage is below a desired voltage level. A buck converter circuit provides the output voltage responsive to the boosted input voltage from the capacitor pump circuit in the first mode of operation and provides the output voltage responsive to the input voltage in a second mode of operation when the input voltage is above the desired voltage level.

Abstract: A DC-DC converter has a plurality of diverse type DC-DC converter channels whose outputs are combined to provide a composite DC power output to a load. One of the channels is a high efficiency power path that supplies the average current demand of the load. A second channel comprises a fast transient response power path which handles transient response demands.

Abstract: A multiphase DC-DC converter architecture, in which respectively different channels have different operational performance parameters. These different parameters are selected so as to enable the converter to achieve an extended range of high efficiency. The converter contains a combination of one or more fast response time-based converter channels, and one or more highly efficient converter channels in respectively different phases thereof and combines the outputs of all the channels. The efficiency of the asymmetric multiphase converter is higher at light loads (up to approximately 12 amps), enabling it to offer longer battery life in applications that spend most of their operating time in the leakage mode, as noted above.