Abstract: An LED system includes an LED array, a plurality of driver circuits, a power supply, a bus and a feedback circuit. Each of the plurality of driver circuits is connected to and driving one of a plurality of LED subarrays in the LED array. Each of the plurality of driver circuits includes a comparator circuit, a local voltage register, and a global voltage register. The comparator circuit determines, as a local minimum voltage, a lowest voltage in the corresponding LED subarray. The global minimum voltage is determined by comparing all the local minimum voltages. The feedback circuit provides the power supply with a feedback signal reflecting the global minimum voltage and causes the power supply to adjust the voltage output to the LED array.

Abstract: An LED display panel contains an LED array having a plurality of LED pixels, a plurality of scan switches, and a plurality of LED columns. The anode of each LED pixel in each LED column is connected to a common anode node and the common anode node is connected to an output of a current source, while the cathode of each LED pixel in each LED column is switchably connected to a current sink via one of the plurality of scan switches. The common anode node is connected to a first input of a comparator circuit and is switchably connected to an anode voltage source. The second input of the comparator circuit is connected to a reference voltage source and an output of the comparator circuit signally controls a switch member that switchably connects the common anode node to the current sink.

Abstract: An LED display device includes an LED array and a driver system thereof. The LED display device is configured so that LEDs in the LED array can switch between receiving scan signals at their anodes or receiving scan signals at their cathodes.

Abstract: An LED display device includes an LED array and a driver system thereof. The LED display device is configured so that LEDs in the LED array can switch between receiving scan signals at their anodes or receiving scan signals at their cathodes.

Abstract: An LED display system has and LED display panel coupled to a driver circuitry. The driver circuitry includes a scrambled PWM generator, a register, and a memory. The scrambled PWM generator receives an image data from an external source and, after certain compensations, is sent to a scramble PWM generator to be distributed according to a new set of rules that involves a compensation image data K. Image data K can be an empirical value or obtained according a formula using coefficients p and q, which can be obtained by calibration.

Abstract: An LED display system includes a driver chip and an LED array having m scan lines, n channels, and m scan switches. The driver chip includes an analog circuit and a digital controller that controls the analog circuit. The analog circuit has a plurality of power sources that are electrically connected to the LED array and provide a plurality of driving currents to the n channels of LEDs. Further, the n channels are divided into p groups and each group has q channels, p is an integer of 2 to n. Channels in each of the p groups receive a plurality of PWM signals. The starting times of the input PWM signals to at least two different groups among the p groups are different. Further, PMW signals to the channels in the same group may have a same starting time or may have different starting times.

Abstract: An LED display system includes a driver chip and an LED array having m scan lines, n channels, and m scan switches. The driver chip includes an analog circuit and a digital controller that controls the analog circuit. The analog circuit has a plurality of power sources that are electrically connected to the LED array and provide a plurality of driving currents to the n channels of LEDs. Further, the n channels are divided into p groups and each group has q channels, p is an integer of 2 to n. Channels in each of the p groups receive a plurality of PWM signals. The starting times of the input PWM signals to at least two different groups among the p groups are different. Further, PMW signals to the channels in the same group may have a same starting time or may have different starting times.

Abstract: A method for generating fractional PWM pulses to drive an light emitting device includes generating multiphase clock signals using a multiphase PLL or DLL includes the steps of generating a plurality of phases of PWM pulses that correspond to a number of phases of the multiphase clock signals, selecting two or more phases amongst the plurality of PWM pulses, performing logic operations of the selected phases of PWM pulses to generate fractional PWM pulses, and generating a driving current using the fractional PWM pulses in a current source. The light emitting device is can be an LED display comprising an LED array having a plurality of channels and a plurality of scan lines. The driving current drives LEDs in one of the plurality of channels.

Abstract: A method for generating fractional PWM pulses to drive an light emitting device includes generating multiphase clock signals using a multiphase PLL or DLL includes the steps of generating a plurality of phases of PWM pulses that correspond to a number of phases of the multiphase clock signals, selecting two or more phases amongst the plurality of PWM pulses, performing logic operations of the selected phases of PWM pulses to generate fractional PWM pulses, and generating a driving current using the fractional PWM pulses in a current source. The light emitting device is can be an LED display comprising an LED array having a plurality of channels and a plurality of scan lines. The driving current drives LEDs in one of the plurality of channels.

Abstract: An LED display system has and LED display panel coupled to a driver circuitry. The driver circuitry includes a scrambled PWM generator, a register, and a memory. The scrambled PWM generator receives an image data from an external source and, after certain compensations, is sent to a scramble PWM generator to be distributed according to a new set of rules that involves a compensation image data K. Image data K can be an empirical value or obtained according a formula using coefficients p and q, which can be obtained by calibration.

Abstract: An LED display device includes a transmitter having a memory and a pixel mapping table, a plurality of first receivers coupled to the transmitter, a plurality of second receiver modules, and a plurality of LED driver groups. A unique address is assigned to a data packet with a use of the pixel mapping table. The data packet has a set of field information and the set of field information includes the unique address. Each of the second receiver modules is coupled to at least one of the first receivers and includes a plurality of second receivers. None of the plurality of second receivers comprises a pixel mapping memory. Each of the LED driver groups is coupled to one of the plurality of second receivers and includes a plurality of LED drivers.

Abstract: An LED display device includes a transmitter having a memory and a pixel mapping table, a plurality of first receivers coupled to the transmitter, a plurality of second receiver modules, and a plurality of LED driver groups. A unique address is assigned to a data packet with a use of the pixel mapping table. The data packet has a set of field information and the set of field information includes the unique address. Each of the second receiver modules is coupled to at least one of the first receivers and includes a plurality of second receivers. None of the plurality of second receivers comprises a pixel mapping memory. Each of the LED driver groups is coupled to one of the plurality of second receivers and includes a plurality of LED drivers.

Abstract: A display device is provided. The display device includes a transmitter, a plurality of first receivers, a plurality of second receiver modules, and a plurality of LED driver groups. The transmitter transmits at least one of a configuration data packet and an image data packet. Each of the configuration and image data packets includes a set of field information. At least one first receiver is coupled to the transmitter. Each of the plurality of second receiver modules is coupled to at least one of first receivers. Each of the plurality of second receiver modules includes a plurality of second receivers. Each of the second receivers reads the set of field information so as to determine whether the set of field information is designated thereto. Each of the plurality of LED driver groups is coupled to the at least one of the second receivers. Each of the plurality of LED driver groups includes a plurality of LED drivers.

Abstract: This disclosure describes an LED display device. The LED display device includes a transmitter having a memory and a pixel mapping table, a plurality of first receivers coupled to the transmitter, a plurality of second receiver modules, and a plurality of LED driver groups. A unique address is assigned to a data packet with a use of the pixel mapping table. The data packet has a set of field information and the set of field information includes the unique address. Each of the second receiver modules is coupled to at least one of the first receivers and includes a plurality of second receivers. None of the plurality of second receivers comprises a pixel mapping memory. Each of the LED driver groups is coupled to one of the plurality of second receivers and includes a plurality of LED drivers.

Abstract: This disclosure describes an LED display device. The LED display device includes a transmitter, a plurality of first receivers coupled to the transmitter, a plurality of second receiver modules, wherein each of the second receiver modules is coupled to at least one of the first receivers and comprises a plurality of second receivers, a plurality of LED driver groups, each of the LED driver groups coupled to at least one of the second receivers and having a plurality of LED drivers, and a transformerless wire link connecting the plurality of first receivers to the plurality of second receiver modules, or the transformerless wire link connecting adjacent receivers of the plurality of second receivers therebetween.

Abstract: This disclosure describes an LED display device. The LED display device includes a transmitter, a plurality of first receivers coupled to the transmitter, a plurality of second receiver modules, wherein each of the second receiver modules is coupled to at least one of the first receivers and comprises a plurality of second receivers, a plurality of LED driver groups, each of the LED driver groups coupled to at least one of the second receivers and having a plurality of LED drivers, and a transformerless wire link connecting the plurality of first receivers to the plurality of second receiver modules, or the transformerless wire link connecting adjacent receivers of the plurality of second receivers therebetween.

Abstract: This disclosure describes an LED display device. The LED display device includes a transmitter having a memory and a pixel mapping table, a plurality of first receivers coupled to the transmitter, a plurality of second receiver modules, and a plurality of LED driver groups. A unique address is assigned to a data packet with a use of the pixel mapping table. The data packet has a set of field information and the set of field information includes the unique address. Each of the second receiver modules is coupled to at least one of the first receivers and includes a plurality of second receivers. None of the plurality of second receivers comprises a pixel mapping memory. Each of the LED driver groups is coupled to one of the plurality of second receivers and includes a plurality of LED drivers.

Abstract: A display device is provided. The display device includes a transmitter, a plurality of first receivers, a plurality of second receiver modules, and a plurality of LED driver groups. The transmitter transmits at least one of a configuration data packet and an image data packet. Each of the configuration and image data packets includes a set of field information. At least one first receiver is coupled to the transmitter. Each of the plurality of second receiver modules is coupled to at least one of first receivers. Each of the plurality of second receiver modules includes a plurality of second receivers. Each of the second receivers reads the set of field information so as to determine whether the set of field information is designated thereto. Each of the plurality of LED driver groups is coupled to the at least one of the second receivers. Each of the plurality of LED driver groups includes a plurality of LED drivers.

Abstract: The apparatus for driving LED display includes a system control unit having a synchronization signal generator configured to generate a synchronization start signal and a plurality of phase locked loop circuits. Each of the phase locked loop circuits includes a divider coupled to the voltage controlled oscillator and configured to change the sequence of dividing ratios over a modulation period, a sigma delta modulator configured to generate a sequence of random numbers to the divider, and a spread spectrum modulation depth controller coupled to the sigma delta modulator and configured to receive the synchronization start signal from the synchronization signal generator. Upon receipt of the synchronization start signal, the spread spectrum modulation depth controller starts a spread spectrum modulation.

Abstract: An apparatus for driving LED display includes a plurality of phase locked loop circuits. Each of the phase locked loop circuits includes a divider configured to receive the voltage controlled output signal and generate the feedback signal, a memory configured to generate a modulation profile codes and a sigma delta block. The divider receives a randomized numbers so as to change a dividing ratio over a modulation period. The sigma delta block includes at least one sigma delta modulator and at least one gain block. The sigma delta block is configured to receive the modulation profile codes and generate the randomized numbers to the divider. Each of the at least one gain block is configured to generate a value that is multiplied to at least one of the at least one sigma delta modulator so as to change a spread spectrum modulation depth.