Patents by Inventor Sheau Lim

Sheau Lim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070190772
    Abstract: A stress-relief layer is formed by dispensing a polymer upon a substrate lower surface under conditions to partially embed a low melting-point solder bump that is disposed upon the lower surface. The stress-relief layer flows against the low melting-point solder bump. A stress-compensation collar is formed on a board to which the substrate is mated, and the stress-compensation collar partially embeds the low melting-point solder bump. An article that exhibits a stress-relief layer and a stress-compensation collar is also included. A computing system that includes the low melting-point solder, the stress-relief layer, and the stress-compensation collar is also included.
    Type: Application
    Filed: April 17, 2007
    Publication date: August 16, 2007
    Inventors: Daewoong Suh, Saikumar Jayaraman, Stephen Lehman, Mitesh Patel, Tiffany Byrne, Eward Martin, Mohd Erwan Basiron, Wei Loh, Sheau Lim, Yoong Tatt Chin
  • Publication number: 20050224951
    Abstract: A stress-relief layer is formed by dispensing a polymer upon a substrate lower surface under conditions to partially embed a solder bump that is disposed upon the lower surface. The stress-relief layer flows against the solder bump. An article that exhibits a stress-relief layer with a structure characteristic of the manner of dispensing is also included. A computing system that includes a stress-relief layer with a structure characteristic of the manner of dispensing is also included.
    Type: Application
    Filed: March 31, 2004
    Publication date: October 13, 2005
    Inventors: Daewoong Suh, Christos Economopoulos, Saikumar Jayaraman, Mohd Basiron, Sheau Lim, Yoong Chin
  • Publication number: 20050221534
    Abstract: A stress-relief layer is formed by dispensing a polymer upon a substrate lower surface under conditions to partially embed a solder bump that is disposed upon the lower surface. The stress-relief layer flows against the solder bump. A stress-compensation collar is formed on a board to which the substrate is mated and the SCC partially embeds the solder bump. An article that exhibits a stress-relief layer and a stress-compensation collar is also included. A computing system that includes a stress-relief layer and a stress-compensation collar is also included.
    Type: Application
    Filed: March 31, 2004
    Publication date: October 6, 2005
    Inventors: Daewoong Suh, Saikumar Jayaraman, Mohd Bin Basiron, Sheau Lim, Yoong P. Chin
  • Publication number: 20050133938
    Abstract: A system for chip packaging includes an adamantoid packaging composition. The adamantoid composition ameliorates the CTE mismatch that typically exists between a packaged die and a resin-impregnated fiberglass mounting substrate. In an embodiment, the system includes a packaging composition that alone exhibits a CTE that is characteristic of an inorganic-filled underfill composite previously known. An embodiment is also directed to the assembly of a chip package that uses an adamantoid packaging composition.
    Type: Application
    Filed: December 18, 2003
    Publication date: June 23, 2005
    Inventors: Sheau Lim, Choong Chee