Abstract: Methods for depositing hemispherical grained silicon layers and nanocrystalline grain-sized polysilicon layers are provided. The hemispherical grained silicon layers and nanocrystalline grain-sized polysilicon layers are deposited in single substrate chemical vapor deposition chambers. The hemispherical grained silicon layers and nanocrystalline grain-sized polysilicon layers may be used as electrode layers in semiconductor devices. In one aspect, a two step deposition process is provided to form a nanocrystalline grain-sized polysilicon layer with a reduced roughness.

Abstract: Numerous embodiments of a method for depositing a layer of nano-crystal silicon on a substrate. In one embodiment of the present invention, a substrate is placed in a single wafer chamber and heated to a temperature between about 300° C. to about 490° C. A silicon source is also fed into the single wafer chamber.

Abstract: A method for processing a workpiece in a plasma reactor chamber having radially inner and outer source power applicators at a ceiling of the chamber facing the workpiece, the inner and outer source power applicators and the workpiece sharing a common axis of symmetry. The method includes applying RF source power to the source power applicator, and introducing a process gas into the reactor chamber so as to carry out a plasma process on the workpiece characterized by a plasma process parameter, the plasma process parameter having a spatial distribution across the surface of the workpiece.

Abstract: A plasma reactor for processing a workpiece includes a process chamber having an enclosure including a ceiling and having a vertical axis of symmetry generally perpendicular to the ceiling, a workpiece support pedestal inside the chamber and generally facing the ceiling, process gas injection apparatus coupled to the chamber and a vacuum pump coupled to the chamber. The reactor further includes a plasma source power applicator overlying the ceiling and having a radially inner applicator portion and a radially outer applicator portion, and RF power apparatus coupled to the inner and outer applicator portions, and tilt apparatus supporting at least the outer applicator portion and capable of tilting at least the outer applicator portion about a radial axis perpendicular to the axis of symmetry and capable of rotating at least the outer applicator portion about the axis of symmetry.

Abstract: A plasma reactor for processing a workpiece includes a process chamber comprising an enclosure including a ceiling and having a vertical axis of symmetry generally perpendicular to said ceiling, a workpiece support pedestal inside the chamber and generally facing the ceiling, process gas injection apparatus coupled to the chamber and a vacuum pump coupled to the chamber. The reactor further includes a plasma source power applicator overlying the ceiling and comprising a radially inner applicator portion and a radially outer applicator portion, and RF power apparatus coupled to said inner and outer applicator portions, and tilt apparatus capable of tilting either the workpiece support pedestal or the outer applicator portion about a radial axis perpendicular to said axis of symmetry and capable of rotating said workpiece support pedestal about said axis of symmetry.

Abstract: A method for processing a workpiece in a plasma reactor chamber having radially inner and outer source power applicators at a ceiling of the chamber facing the workpiece, the inner and outer source power applicators and the workpiece sharing a common axis of symmetry. The method includes applying RF source power to the source power applicators, and introducing a process gas into the reactor chamber so as to carry out a plasma process on the workpiece characterized by a plasma process parameter, the plasma process parameter having a spatial distribution across the surface of the workpiece.

Abstract: Methods for depositing hemispherical grained silicon layers and nanocrystalline grain-sized polysilicon layers are provided. The hemispherical grained silicon layers and nanocrystalline grain-sized polysilicon layers are deposited in single substrate chemical vapor deposition chambers. The hemispherical grained silicon layers and nanocrystalline grain-sized polysilicon layers may be used as electrode layers in semiconductor devices. In one aspect, a two step deposition process is provided to form a nanocrystalline grain-sized polysilicon layer with a reduced roughness.

Abstract: Method of forming a lightly phosphorous doped silicon film. A substrate is provided. A process gas comprising a phosphorous source gas and a disilane gas is used to form a lightly phosphorous doped silicon film on the substrate. The diluted phosphorous source gas has a phosphorous concentration of 1%. The phosphorous source gas and the disilane gas have a flow ratio less than 1:100. The lightly phosphorous doped silicon film has a phosphorous doping concentration less than 1×1020 atoms/cm3.

Abstract: Numerous embodiments of a method for depositing a layer of nano-crystal silicon on a substrate. In one embodiment of the present invention, a substrate is placed in a single wafer chamber and heated to a temperature between about 300° C. to about 490° C. A silicon source is also fed into the single wafer chamber.