Abstract: A transient voltage suppressing (TVS) device including a first silicon-controlled rectifier and a voltage clamp having a first terminal and a second terminal. The first terminal is connected to a cathode of the first silicon-controlled rectifier.

Abstract: A transient voltage suppressing (TVS) protection device includes a first high-side steering diode having an anode terminal coupled to a first protected node and a cathode terminal coupled to a second node; and a first low-side steering diode having a cathode terminal coupled to the first protected node and an anode terminal coupled to a third node, wherein the first low-side steering diode comprises a silicon controlled rectifier including alternating p-type and n-type regions, the outermost p-type region forming the anode terminal and the outermost n-type region forming the cathode terminal, the n-type region between a pair of p-type regions being substantially depleted at a bias voltage of zero volt.

Abstract: A transient voltage suppressing device includes a plurality of fingers arranged laterally along a major surface of an epitaxial layer. The plurality of fingers includes fingers of a first type and fingers of a second type. The first type and second type of fingers each include a silicon controlled rectifier (SCR) region and a junction diode region. The plurality of fingers of the second type are conductively coupled together by a second metal layer disposed over top a first metal layer and electrically insulated from the first metal layer. The first metal layer conductively couples the SCR region and junction diode region of the first type of finger.

Abstract: A bidirectional transient voltage suppressor (TVS) protection circuit includes two sets of steering diodes with a clamp device merged with a steering diode in each set. In one embodiment, the protection circuit includes a first high-side diode integrated with a first silicon controlled rectifier (SCR), a first low-side diode, a second high-side diode integrated with a second SCR, and a second low-side diode. In another embodiment, the protection circuit includes a first high-side diode, a first low-side diode integrated with a first SCR, a second high-side diode, and a second low-side diode integrated with a second SCR. In some embodiments, the TVS protection circuit realizes low capacitance at the protected nodes by fully or almost completely depleting the P-N junction connected to the protected nodes in the operating voltage range.

Abstract: A transient voltage suppressor (TVS) device includes a MOS-triggered silicon controlled rectifier (SCR) as the high-side steering diode and a silicon controlled rectifier (SCR) for the low-side steering diode. In one embodiment, the MOS-triggered SCR includes alternating p-type and n-type regions and a diode-connected MOS transistor integrated therein to trigger the silicon controlled rectifier to turn on. In one embodiment, the SCR of the low-side steering diode includes alternating p-type and n-type regions where the p-type region adjacent the n-type region forming the cathode terminal is not biased to any electrical potential.

Abstract: A bidirectional transient voltage suppressor (TVS) protection circuit includes two sets of steering diodes, a clamp circuit including an MOS transistor integrated with a silicon controlled rectifier (SCR) and a trigger circuit. In response to a voltage applied to one of the protected nodes exceeding a first voltage level, the trigger circuit drives the MOS transistor to cause a current flow at the SCR to trigger an SCR action and the SCR clamps the voltage at the respective protected node at a clamping voltage. In other embodiments, a bidirectional transient voltage suppressor (TVS) protection circuit includes two sets of steering diodes with a clamp device merged with a steering diode in each set. In some embodiments, the TVS protection circuit realizes low capacitance at the protected nodes by fully or almost completely depleting the P-N junction connected to the protected nodes in the operating voltage range.

Abstract: A power device, circuit and method of making are described. The power device circuit includes a semiconductor substrate composition having a substrate layer of a first conductivity type wherein the first conductivity type is opposite a second conductivity type. Two or more lateral double diffused metal oxide semiconductor (LDMOS) devices are formed in the substrate layer and integrated into an isolation region of a high voltage well, wherein each LDMOS is isolated from a power device substrate area by an isolator structure formed from the substrate layer. One or more boost structures are integrated into the isolation region of the high voltage well wherein the one or more boost structures are in contact with the high voltage well and extend into the isolation region of the high voltage well.

Abstract: A transient voltage suppressor (TVS) device includes a MOS-triggered silicon controlled rectifier (SCR) as the high-side steering diode and a silicon controlled rectifier (SCR) for the low-side steering diode. In one embodiment, the MOS-triggered SCR includes alternating p-type and n-type regions and a diode-connected MOS transistor integrated therein to trigger the silicon controlled rectifier to turn on. In one embodiment, the SCR of the low-side steering diode includes alternating p-type and n-type regions where the p-type region adjacent the n-type region forming the cathode terminal is not biased to any electrical potential.

Abstract: A transient voltage suppressor (TVS) device uses a punch-through silicon controlled rectifier (SCR) structure for the low-side steering diode where the punch-through SCR structure realizes low capacitance at the protected node. In some embodiments, the punch-through silicon controlled rectifier of the low-side steering diode includes a first doped region formed in a first epitaxial layer, a first well formed spaced apart from the first doped region where the first well is not biased to any electrical potential, and a second doped region formed in the first well. The first doped region, the first epitaxial layer, the first well and the second doped region form the punch-through silicon controlled rectifier, with the first doped region forming the anode and the second doped region forming the cathode of the punch-through silicon controlled rectifier.

Abstract: A bidirectional transient voltage suppressor (TVS) protection circuit includes two sets of steering diodes, a clamp circuit including an MOS transistor integrated with a silicon controlled rectifier (SCR) and a trigger circuit. In response to a voltage applied to one of the protected nodes exceeding a first voltage level, the trigger circuit drives the MOS transistor to cause a current flow at the SCR to trigger an SCR action and the SCR clamps the voltage at the respective protected node at a clamping voltage. In other embodiments, a bidirectional transient voltage suppressor (TVS) protection circuit includes two sets of steering diodes with a clamp device merged with a steering diode in each set. In some embodiments, the TVS protection circuit realizes low capacitance at the protected nodes by fully or almost completely depleting the P-N junction connected to the protected nodes in the operating voltage range.

Abstract: A transient voltage suppressing device includes a plurality of fingers arranged laterally along a major surface of an epitaxial layer. The plurality of fingers includes fingers of a first type and fingers of a second type. The first type and second type of fingers each include a silicon controlled rectifier (SCR) region and a junction diode region. The plurality of fingers of the second type are conductively coupled together by a second metal layer disposed over top a first metal layer and electrically insulated from the first metal layer. The first metal layer conductively couples the SCR region and junction diode region of the first type of finger.

Abstract: A bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes and a diode triggered clamp device in some embodiment. In other embodiments, a bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes with a clamp device merged with a steering diode in each set. The TVS circuit is constructed to realize low capacitance at the protected nodes and improved clamping voltage for robust protection against surge evens. In some embodiments, the TVS circuit realizes low capacitance at the protected nodes by fully or almost completely depleting the P-N junction connected to the protected nodes in the operating voltage range. In this manner, the TVS circuit does not present undesirable parasitic capacitance to the data pins being protected, especially when the data pins are applied in high speed applications.

Abstract: A MOSFET and an electrostatic discharge (ESD) protection device on a common chip includes a MOSFET with a source, a gate, and a drain, and an ESD protection device configured to implement a diode function that is biased to prevent current from flowing through the common chip from the source to the drain.

Abstract: A transient voltage suppressor (TVS) device includes a silicon controlled rectifier (SCR) as the clamp device between a high-side steering diode and a low-side steering diode. The SCR includes alternating emitter and base regions arranged interleaving in a direction along a major surface of a semiconductor layer and orthogonal to a current path of the SCR. The TVS device realizes low capacitance and high holding voltage at the protected node.

Abstract: A bidirectional transient voltage suppressor is constructed as an NPN bipolar transistor incorporating optimized collector-base junction realizing avalanche mode breakdown. In some embodiments, the bidirectional transient voltage suppressor is constructed as an NPN bipolar transistor incorporating individually optimized collector-base and emitter-base junctions with the optimized junctions being spatially distributed. The optimized collector-base and emitter-base junctions both realize avalanche mode breakdown to improve the breakdown voltage of the transistor. Alternately, a unidirectional transient voltage suppressor is constructed as an NPN bipolar transistor with a PN junction diode connected in parallel in the reverse bias direction to the protected node and incorporating individually optimized collector-base junction of the bipolar transistor and p-n junction of the diode.

Abstract: A MOSFET and an electrostatic discharge (ESD) protection device on a common chip includes a MOSFET with a source, a gate, and a drain, and an ESD protection device configured to implement a diode function that is biased to prevent current from flowing through the common chip from the source to the drain.

Abstract: A bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes and a diode triggered clamp device in some embodiment. In other embodiments, a bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes with a clamp device merged with a steering diode in each set. The TVS circuit is constructed to realize low capacitance at the protected nodes and improved clamping voltage for robust protection against surge evens. In some embodiments, the TVS circuit realizes low capacitance at the protected nodes by fully or almost completely depleting the P-N junction connected to the protected nodes in the operating voltage range. In this manner, the TVS circuit does not present undesirable parasitic capacitance to the data pins being protected, especially when the data pins are applied in high speed applications.

Abstract: A MOSFET and an electrostatic discharge (ESD) protection device on a common chip includes a MOSFET with a source, a gate, and a drain, and an ESD protection device configured to implement a diode function that is biased to prevent current from flowing through the common chip from the source to the drain.

Abstract: A bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes and a diode triggered clamp device in some embodiment. In other embodiments, a bidirectional transient voltage suppressor (TVS) circuit for data pins of electronic devices includes two sets of steering diodes with a clamp device merged with a steering diode in each set. The TVS circuit is constructed to realize low capacitance at the protected nodes and improved clamping voltage for robust protection against surge evens. In some embodiments, the TVS circuit realizes low capacitance at the protected nodes by fully or almost completely depleting the P-N junction connected to the protected nodes in the operating voltage range. In this manner, the TVS circuit does not present undesirable parasitic capacitance to the data pins being protected, especially when the data pins are applied in high speed applications.

Abstract: A transient voltage suppressor (TVS) device uses a punch-through silicon controlled rectifier (SCR) structure for the low-side steering diode where the punch-through SCR structure realizes low capacitance at the protected node. In some embodiments, the punch-through silicon controlled rectifier of the low-side steering diode includes a first doped region formed in a first epitaxial layer, a first well formed spaced apart from the first doped region where the first well is not biased to any electrical potential, and a second doped region formed in the first well. The first doped region, the first epitaxial layer, the first well and the second doped region form the punch-through silicon controlled rectifier, with the first doped region forming the anode and the second doped region forming the cathode of the punch-through silicon controlled rectifier.